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DM74LS491N Scheda tecnica(PDF) 1 Page - National Semiconductor (TI) |
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DM74LS491N Scheda tecnica(HTML) 1 Page - National Semiconductor (TI) |
1 / 4 page TLL8332 July 1989 DM54LS49174LS491 10-Bit Counter General Description The ten-bit counter can count up count down set and load 2 LSB’s 2 MSB’s and 6 middle bits high or low as a group All operations are synchronous with the clock SET over- rides LOAD COUNT and HOLD LOAD overrides COUNT COUNT is conditional on CIN otherwise it holds All outputs are enabled when OE is low otherwise HIGH-Z The 24 mA IOL outputs are suitable for driving RAMPROM address lines in video graphics systems FeaturesBenefits Y CRT vertical and horizontal timing generation Y Bus-structured pinout Y 24-pin SKINNYDIP saves space Y TRI-STATE outputs drive bus lines Y Low current PNP inputs reduce loading Connection Diagram Top View TLL8332 – 1 Order Number DM54LS491J DM74LS491J or DM74LS491N See NS Package Number J24F or N24C Standard Test Load TLL8332 – 2 Function Table OE CK SET LD CNT CIN UP D9-D0 Q9-Q0 Operation H X X X X X X X Z Hi-Z L u H X X X X X H Set all HIGH L u L L X X X D D LOAD D L u L H H X X X Q HOLD L u L H L H X X Q HOLD L u L H L L L X Q plus 1 Count UP L u L H L L H X Q minus 1 Count DN TRI-STATE is a registered trademark of National Semiconductor Corp C1995 National Semiconductor Corporation RRD-B30M115Printed in U S A |
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