CY2X014

Document Number: 001-10179 Rev. *K

Page 3 of 15

Pin Configurations

Figure 1. 6-pin Ceramic LCC pinout

1

3

OE/PD#

CLK

6

4

2

5CLK#

DNU

Pin Definitions

Pin

Name

I/O Type

Description

1

OE/PD#

CMOS input

Output enable pin: Active HIGH. If OE = 1, CLK is enabled.

Power-down pin: Active LOW. If PD# = 0, the device is powered down and the clock

is disabled. The functionality of this pin is programmable.

4, 5

CLK, CLK#

LVPECL output Differential output clock

2DNU

–

Do not use: DNU pins are electrically connected, but perform no function

Power

Supply voltage: 2.5 V or 3.3 V

Power

Ground