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ML145162EP Scheda tecnica(PDF) 11 Page - LANSDALE Semiconductor Inc.

Il numero della parte ML145162EP
Spiegazioni elettronici  60 MHz and 85 MHz Universal Programmable Dual PLL Frequency Synthesizers
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Produttore elettronici  LANSDALE [LANSDALE Semiconductor Inc.]
Homepage  http://www.lansdale.com
Logo LANSDALE - LANSDALE Semiconductor Inc.

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Issue 0
REFERENCE FREQUENCY SELECTION
AND PROGRAMMING
Figure 16 shows the bit function of the reference frequency
programming word. The user can either select the “fixed” ref-
erence frequency for all channels accordingly or provide a spe-
cific reference frequency for a particular channel by using two
reference frequency counters (e.g., for an application in
France, the base set transmit channel common fixed reference
frequency is 6.25 kHz or 12.5 kHz). (See Table 3 and Figure 6
for reference frequencies for various countries.) However,
transmit channels 6, 8, and 14 can be set to 25 kHz, and chan-
nel 8 reference frequency can be set to 50 kHz. But this refer-
ence frequency may not be applied to the receiving side; there-
fore, the receiving side reference frequency must be generated
by another reference frequency counter. The higher the refer-
ence frequency, the better the phase noise performance and
faster the lock time, but the PLL consumes more current if
both reference frequency counters are in operation.
In general, the 12–bit reference frequency counter plus the ÷ 4
and ÷ 25 module can offer all the reference frequencies for
global CT–1 transmit and receive channel requirements. Users
can select their own reference frequency by introducing the
additional 14–bit auxiliary reference frequency counter.
Again, the 14–bit auxiliary reference frequency counter can
be shut down by the auxiliary reference enable bit in the refer-
ence counter programming word by setting the bit to 0. At this
state, the fR2 is automatically connected to point C (the ÷25
block output), and fR1 can be connected to point A or B by
setting the fR1–S1 and fR1–S2 bits in the reference counter
program word. The 14–bit auxiliary reference frequency count-
er data will be in “Don’t Care” state.
If the 14–bit auxiliary reference frequency counter is enabled
(auxiliary reference enable = 1), then fR2 is automatically con-
nected to point D (14–bit counter output), and fR1 can be
selected to connect to point A, B, or C, depending on the bit
setting of fR1–S1 and fR1–S2. Table 4 and Figure 16 describe
the functions of the auxiliary reference enable bit and the
fR1–S1 and fR1–S2 bits selection.
LANSDALE Semiconductor, Inc.
ML145162
ADin
CLK
ENB
Figure 15. Programming Format for Transmit and Receive Counters
(4–Pin Interfacing Scheme)
16–BIT Tx COUNTER
DIVDE RATIO
Din
16–BIT Rx COUNTER
DIVIDE RATIO
NOTE: ENB must be low during the serial transfer.
LAST
CLOCK
Table 3. Global CT–1 Reference Frequency Setting vs Channel Frequencies
Country
Channels Frequency
fR1
fR2
U.S.A.
46/49 MHz (10, 15, 25 Channels)
5.0 kHz
France
26/41 MHz
6.25 kHz/12.5 kHz
Spain
31/41 MHz
5.0 kHz
Australia
30/39 MHz
5.0 kHz
U.K.
1.7/47 MHz
6.25 kHz
1.0 kHz
New Zealand
1.7/34/40 MHz
6.25 kHz
1.0 kHz


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