www.lansdale.com

Page 2 of 10

Issue A

LANSDALE Semiconductor, Inc.

ML145406

Rating

Symbol

Value

Unit

DC Supply Voltages (VDD ≥ VCC)

VDD

VSS

VCC

– 0.5 to + 13.5

+ 0.5 to – 13.5

– 0.5 to + 6.0

V

Input Voltage Range

Rx1–3 Inputs

DI1–3 Inputs

VIR

(VSS – 15) to (VDD + 15)

– 0.5 to (VCC + 0.5)

V

DC Current Per Pin

± 100

mA

Power Dissipation

PD

1.0

W

Operating Temperature Range

TA

– 40 to + 85

°C

Storage Temperature Rate

Tstg

– 85 to + 150

°C

Parameter

Symbol

Min

Typ

Max

Unit

DC Supply Voltage

VDD

VSS

VCC (VDD ≥ VCC)

VDD

VSS

VCC

4.5

– 4.5

4.5

5 to 12

– 5 to – 12

5.0

13.2

– 13.2

5.5

V

Quiescent Supply Current (Outputs unloaded, inputs low)

VDD = + 12 V

VSS = – 12 V

VCC = + 5 V

IDD

ISS

ICC

—

—

—

140

340

300

400

600

450

µA

RECEIVER ELECTRICAL SPECIFICATIONS

(Voltage polarities referenced to GND = 0 V, VDD = + 5 to + 12 V, VSS = – 5 to – 12 V, VDD ≥ VCC, TA = – 40 to + 85°C)

Characteristic

Symbol

Min

Typ

Max

Unit

Input Turn–on Threshold

Rx1–Rx3

VDO1–DO3 = VOL, VCC = 5.0 V ± 5%

Von

1.35

1.80

2.35

V

Input Turn–off Threshold

Rx1–Rx3

VDO1–DO3 = VOH, VCC = 5.0 V ± 5%

Voff

0.75

1.00

1.25

V

Input Threshold Hysteresis

Rx1–Rx3

VCC = 5.0 V ± 5%

Von–Voff

0.6

0.8

—

V

Input Resistance

Rx1–Rx3

(VSS – 15 V) ≤ VRx1–Rx3 ≤ (VDD + 15 V)

Rin

3.0

5.4

7.0

k

High–Level Output Voltage (VRx1–Rx3 = – 3 V to (VSS – 15 V))*

DO1–DO3

IOH = – 20 µA, VCC = + 5.0 V

IOH = –1 mA, VCC = + 5.0 V

VOH

4.9

3.8

4.9

4.3

—

—

V

Low–Level Output Voltage (VRx1–Rx3 = + 3 V to (VDD + 15 V))* DO1–DO3

IOL = + 20 µA, VCC = + 5.0 V

IOL = + 2 mA, VCC = + 5.0 V

IOL = + 4 mA, VCC = + 5.0 V

VOL

—

—

—

0.01

0.02

0.5

0.1

0.5

0.7

V

* This is the range of input voltages as specified by EIA 232–E to cause a receiver to be in the high or low logic state.

This device contains protection circuitry to pro-

tect the inputs against damage due to high static

voltages or electric fields; however, it is advised

that normal precautions be taken to avoid applica-

tion of any voltage higher than maximum rated

voltages to this high impedance circuit. For proper

operation, it is recommended that the voltages at

the DI and DO pins be constrained to the range

GND

≤VDI≤VCCandGND≤VDO≤VCC.Also,the

voltage at the Rx pin should be constrained to

(VSS – 15 V) ≤ VRx1–3 ≤ (VDD + 15 V), and Tx

should be constrained to VSS ≤ VTx1–3 ≤ VDD.

Unused inputs must always be tied to an ap-

propriate logic voltage level (e.g., GND or VCC for

DI and Ground for Rx.)