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SLG46140 Scheda tecnica(PDF) 59 Page - Dialog Semiconductor |
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SLG46140 Scheda tecnica(HTML) 59 Page - Dialog Semiconductor |
59 / 170 page 000-0046140-109 Page 58 of 169 SLG46140 9.2 ADC Operation Modes The ADC has three operating modes: • Single-Ended ADC operation using IN+ from PIN 6 or 7, when ADC_sel (reg <531>) is “0” • Differential ADC operation using IN+ from PIN 6 and IN- from PIN 7, when ADC_sel (reg <531>) is “1” • Pseudo-Differential ADC operation using IN+ from PIN 6 and IN- from PIN 7, when ADC_sel (reg <531>) and ADC_pseudo-diff_en (reg <536>) bits are both set to “1”. 9.3 ADC 3-bit Programmable Gain Amplifier (PGA) The front end of the ADC is a PGA with 3 bits for setting gain. The PGA buffers the ADC in all cases. The PGA gain is set by the ADC_gain_control (reg<534:532>). See ADC Register Settings Table. Available gain settings depending on PGA mode selected (when used as ADC front-end): • Single-ended: 0.25x, 0.5x, 1x, 2x, 4x, 8x; • Differential: 1x, 2x, 4x, 8x, 16x; • Pseudo-Differential: 1x, 2x, 4x. PGA inputs: • CH SELECTOR: Single-Ended Mode ADC Selection and Analog Input Mux Control Signal (PIN 11, VDD) • IN+: Single-Ended Mode Input (PIN6 or PIN7) and Differential Mode Positive Input (PIN6) • IN-: Differential Mode Negative Input (PIN7 or DAC0) PGA output is connected directly to ADC input. Also, it is possible to connect PIN7 to PGA output (reg<886>), when ADC is not in use only. The output of PGA has an offset when used as ADC front-end. Please see section 9.3.2 PGA Output for more details. 9.3.1 PGA 2-Channel Selection When ADC_channel_sel (reg <530>) is set to “1”, the PGA of the ADC will sample either PIN 6 or PIN 7 on the IN+ input, where the selection is controlled by PIN 11. • When PIN 11 is set to “0”, the ADC will sample PIN 7 • When PIN 11 is set to “1”, the ADC will sample PIN 6 When ADC_channel_sel (reg <530>) is set to “0”, the PGA of the ADC will sample PIN 6 on the IN+ input. Figure 10. ADC 2-Channel Selection Logic “1” 0 1 0 1 CH Selector (Pin 11) IN+ CH#1 (Pin 6) reg <530> IN+ CH#2 (Pin 7) IN+ |
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