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AD1671 Scheda tecnica(PDF) 4 Page - Analog Devices |
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AD1671 Scheda tecnica(HTML) 4 Page - Analog Devices |
4 / 7 page AD1671 ASD0010777 Rev. M | Page 4 of 7 Table I (Continued) TABLE I NOTES: 1/ VCC = +5V, VEE = -5V, VLOGIC = +5V, unless otherwise specified. 2/ This parameter is guaranteed, but not necessarily tested. 3/ RIN values are typical values only. 4/ The AD1671 includes an onboard +2.5 V reference. The reference input pin (REF IN) can be connected to reference output pin (REF OUT) or a standard external +2.5 V reference can be selected to meet specific system requirements. Fast switching input dependent currents are modulated at the reference input. The reference input voltage can be held with the use of a capacitor. To prevent the AD1671’s onboard reference from oscillating when not connected to REF IN, REF OUT must be connected to +5 V. It is possible to connect REF OUT to +5 V due to its output circuit implementation which shuts down the reference Encode Pulse High Figure 3.Timing Diagrams Parameter Symbol Conditions Sub- Limit Limit Units See notes at end of table Note 1/ group Min Max Encode width high (short encode) tENC See figure 3 2/ 9,10,11 20 50 ns Encode width Low (long encode) tENCL See figure 3 2/ 9,10,11 20 DAV pulse width tDAV See figure 3 9,10,11 150 300 Encode falling edge delay tF See figure 3 2/ 90 Start new conversion delay tR See figure 3 2/ 90 Data and QTR delay from DAV falling edge tDD See figure 3 2/ 9 20 Data and OTR delay from DAV rising edge tSS See figure 3 2/ 9 20 |
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