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MRF89XA Scheda tecnica(PDF) 91 Page - Microchip Technology |
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MRF89XA Scheda tecnica(HTML) 91 Page - Microchip Technology |
91 / 140 page 2010-2017 Microchip Technology Inc. Preliminary DS70000622D-page 91 MRF89XA 3.13 Battery Power Management Configuration Values Battery life can be greatly extended in MRF89XA appli- cations where transmissions from field nodes are infre- quent, or network communications can be concentrated in periodic time slots. For example, field nodes in many wireless alarm systems report opera- tional status a few times a day, and can otherwise sleep unless an alarm condition occurs. Sensor networks that monitor parameters that change relatively slowly, such as air and soil temperature in agricultural settings and switching lights ON/OFF, only need to transmit updates a few times per hour. At room temperature, the MRF89XA draws a maximum of 1 μA in Sleep mode, with a typical value of 100 nA. To achieve minimum Sleep mode current, the SDI pin (pin 17) and SCK pin (pin 18) must be held logic low, while CSCON pin (pin 14), CSDAT pin (pin 15) and SDO pin (pin 16) must be held logic high. The MRF89XA can go from Sleep mode through Standby mode and Synthesizer mode to Transmit (or Receive) mode in less than 6 ms. For configuring and driving the device different operating modes refer to Table 2-3. At a data rate of 33.33 kbps, a 32-byte packet with a 4-byte preamble and a 4-byte start pat- tern takes about 10 ms to transmit. Assume that the MRF89XA then switches to Receive mode for one sec- ond to listen for a response and returns to Sleep mode. On the basis of reporting every six hours, the ON to Sleep duty cycle is about 1:21,259, greatly extending battery life over continuous transmit-receive or even standby operation. The required timing accuracy for the microcontrollers in a sleep-cycled application depends on several factors: • The required “timestamp” accuracy of data reported by sleeping field nodes. R-C Sleep mode timers built into many microcontrollers have a tol- erance of ±20% or more. For applications that require more accurate timestamping, many micro- controllers can run on a watch crystal during Sleep mode and achieve timestamp accuracies better than one second per 24 hours. • If the base station and any routing nodes present in a network must sleep cycle in addition to the field nodes. Watch crystal control is usually needed to keep all nodes accurately synchronized to the active time slots. • If the base station and any routing nodes present in a network can operate continuously (AC pow- ered, solar charged batteries), and a loose time stamp accuracy is OK, the microcontrollers in sleeping field nodes can usually operate from internal low-accuracy R-C timers. Therefore, as previously mentioned, Sleep mode is the lowest power consumption mode in which the clock and all functional blocks of the device are disabled. In case of an interrupt, the device wakes up, switches to Active mode and an interrupt signal generated on the IRQ pin indicates the change in state to the host micro- controller. The source of the interrupt can be determined by reading the status word of the device. To reduce current consumption, the MRF89XA should be placed in the low-power consuming Sleep mode. In Sleep mode, the 12.8 MHz main oscillator is turned OFF, disabling the RF and baseband cir- cuitry. Data is retained in the control and FIFO regis- ters and the transceiver is accessible through the SPI port. The MRF89XA does not enter Sleep mode if any interrupt remains active, regardless of the state of the CLKOCNTRL bit (CLKOUTREG<7>). This way, the microcontroller can always have a clock signal to process the interrupt. To prevent high- current consumption, which results in shorter battery life, it is highly recommended to process and clear interrupts before entering Sleep mode. Unnecessary functions should be turned off to avoid unwanted interrupts. To minimize current consumption, the MRF89XA supports different power-saving modes, along with an integrated wake-up timer. When switching from Sleep mode to Standby mode, the crystal oscillator is active for no more than 5 ms. Switching from Standby mode to Synthesizer mode, the PLL locks in less than 0.5 ms. PLL lock can be mon- itored on the PLOCK pin (pin 23) of the MRF89XA. The radio can then be switched to either Transmit or Receive mode. When switching from any other mode back to Sleep mode, the device drops to its Sleep mode current in less than 1 ms. Note: Many host microcontrollers cannot be operated from the MRF89XA buffered clock output if sleep cycling is planned. In Sleep mode, the MRF89XA buffered clock output is disabled, which disables the microcontroller unless it is capable of automatically switching to an internal clock source when external clocking is lost. |
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