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MRF89XA Scheda tecnica(PDF) 20 Page - Microchip Technology |
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MRF89XA Scheda tecnica(HTML) 20 Page - Microchip Technology |
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20 / 140 page  MRF89XA DS70000622D-page 20 Preliminary 2010-2017 Microchip Technology Inc. 2.9.1 TRANSMITTER ARCHITECTURE Figure 2-6 illustrates the transmitter architecture block diagram. The baseband I and Q signals are digitally generated by a DDS whose Digital-to-Analog Converters (DAC) followed by two anti-aliasing low- pass filters transform the digital signal into analog in- phase (I) and quadrature (Q) components whose frequency is the selected frequency deviation, and is set using the FDVAL<7:0> bits from FDEVREG<7:0>. In FSK mode, the input data switches the relative phase of I and Q between -90° and +90° with continu- ous phase. The modulation is therefore performed at this initial stage, because the information contained in the phase difference is converted into a frequency shift when the I and Q signals are up-converted in the first mixer stage. This first up-conversion stage is dupli- cated to enhance image rejection. The FSK convention is such that: DATA = 1 frf + fdev DATA = 0 frf – fdev In OOK mode, the phase difference between the I and Q channels is kept constant (independent of the transmitted data). Thus, the first stage of up-conversion creates a fixed frequency signal at the low IF = fdev (this explains why the transmitted OOK spectrum is offset by fdev). OOK Modulation is accomplished by switching the PA and PA regulator stages ON and OFF. By convention: DATA = 1 PAon DATA = 0 PAoff After the interpolation filters, a set of four mixers combines the I and Q signals and converts them into a pair of complex signals at the second intermediate frequency, equal to one-eighth of the LO frequency, or one-ninth of the RF frequency. These two new I and Q signals are then combined and up-converted to the final RF frequency by two quadrature mixers fed by the LO signal. The signal is pre-amplified, and then the transmitter output is driven by a final power amplifier stage. The I and Q signal details are illustrated in Figure 2-7. FIGURE 2-7: I(t), Q(t) Signals Overview I(t) Q(t) Fdev 1 |
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