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AD5392BST-5 Scheda tecnica(PDF) 11 Page - Analog Devices |
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AD5392BST-5 Scheda tecnica(HTML) 11 Page - Analog Devices |
11 / 44 page AD5390/AD5391/AD5392 Rev. A | Page 11 of 44 SDO SCLK SYNC DIN LDAC t1 24 48 t3 t2 t21 t22 t7 t4 t8 t9 DB23 DB0 DB23 DB0 DB0 INPUT WORD FOR DAC N INPUT WORD FOR DAC N+1 UNDEFINED INPUT WORD FOR DAC N t20 t23 t13 DB23 Figure 2. Serial Interface Timing Diagram (Daisy-Chain Mode) t1 24 24 1 2 t3 t2 t5 t7 t4 t6 t8 t9 t10 t13 t12 t14 t17 t13 t15 t18 t19 t16 VOUT2 CLR VOUT 1LDAC ACTIVE DURING BUSY 2LDAC ACTIVE DURING BUSY SCLK SYNC DIN BUSY LDAC1 LDAC2 VOUT1 DB0 DB23 t17 t11 Figure 3. Serial Interface Timing Diagram (Standalone Mode) |
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