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TL1464IPTG4 Scheda tecnica(PDF) 8 Page - Texas Instruments |
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TL1464IPTG4 Scheda tecnica(HTML) 8 Page - Texas Instruments |
8 / 11 page TL1464I QUAD PULSE-WIDTH-MODULATION CONTROL CIRCUIT SLVS266 – FEBRUARY 2000 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1.4 V 0.7 V 0 V “L” 0 V Vref + 0.7 V 1.5 V VCC 0 V OSCILLATOR WAVEFORM (see Note A) DEAD-TIME INPUT VOLTAGE ERROR AMP. OUTPUT PWM COMP. OUTPUT OUTPUT PIN WAVEFORM REGULATED OUTPUT VOLTAGE (see Note B) SCP PIN WAVEFORM SCP COMP. OUTPUT POWER SUPPLY VOLTAGE “H” “L” “H” “L” “H” 2.7 V VA VA VA DEAD-TIME 100% tpe Protection Enable Time, tpe = 477×103 Cpe (sec) Figure 1. Timing Diagram (CH-1/CH-2) 0 V Vref + 0.7 V 1.5 V VCC 0 V REGULATED OUTPUT VOLTAGE (see Note B) SCP PIN WAVEFORM SCP COMP. OUTPUT POWER SUPPLY VOLTAGE “L” “H” 2.7 V VA VA VA tpe Protection Enable Time, tpe = 477×103 Cpe (sec) 1.4 V 0.7 V “L” OSCILLATOR WAVEFORM (see Note A) ERROR AMP. OUTPUT PWM COMP. OUTPUT OUTPUT PIN WAVEFORM “H” “L” “H” DEAD-TIME 100% Figure 2. Timing Diagram (CH-3/CH-4) NOTES: A. Oscillator waveform of CH-1 and CH-2 is inverting output each other. B. Va = input voltage of pin 29 (pin 24) |
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