Motore di ricerca datesheet componenti elettronici |
|
AD73322 Scheda tecnica(PDF) 13 Page - Analog Devices |
|
AD73322 Scheda tecnica(HTML) 13 Page - Analog Devices |
13 / 44 page AD73322 –12– REV. B TERMINOLOGY Absolute Gain Absolute gain is a measure of converter gain for a known signal. Absolute gain is measured (differentially) with a 1 kHz sine wave at 0 dBm0 for the DAC and with a 1 kHz sine wave at 0 dBm0 for the ADC. The absolute gain specification is used for gain tracking error specification. Crosstalk Crosstalk is due to coupling of signals from a given channel to an adjacent channel. It is defined as the ratio of the amplitude of the coupled signal to the amplitude of the input signal. Crosstalk is expressed in dB. Gain Tracking Error Gain tracking error measures changes in converter output for different signal levels relative to an absolute signal level. The absolute signal level is 0 dBm0 (equal to absolute gain) at 1 kHz for the DAC and 0 dBm0 (equal to absolute gain) at 1 kHz for the ADC. Gain tracking error at 0 dBm0 (ADC) and 0 dBm0 (DAC) is 0 dB by definition. Group Delay Group Delay is defined as the derivative of radian phase with respect to radian frequency, dø(f)/df. Group delay is a measure of average delay of a system as a function of frequency. A linear system with a constant group delay has a linear phase response. The deviation of group delay from a constant indicates the degree of nonlinear phase response of the system. Idle Channel Noise Idle channel noise is defined as the total signal energy measured at the output of the device when the input is grounded (mea- sured in the frequency range 300 Hz–3400 Hz). Intermodulation Distortion With inputs consisting of sine waves at two frequencies, fa and fb, any active device with nonlinearities will create distortion products at sum and difference frequencies of mfa ± nfb where m, n = 0, 1, 2, 3, etc. Intermodulation terms are those for which neither m nor n is equal to zero. For final testing, the second order terms include (fa + fb) and (fa – fb), while the third order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and (fa – 2fb). Power Supply Rejection Power supply rejection measures the susceptibility of a device to noise on the power supply. Power supply rejection is measured by modulating the power supply with a sine wave and measuring the noise at the output (relative to 0 dB). Sample Rate The sample rate is the rate at which the ADC updates its output register and the DAC updates its output from its input register. The sample rate can be chosen from a list of four that are fixed relative to the DMCLK. Sample rate is set by programming bits DIR0-1 in Control Register B of each channel. SNR+THD Signal-to-noise ratio plus total harmonic distortion is defined to be the ratio of the rms value of the measured input signal to the rms sum of all other spectral components in the frequency range 300 Hz–3400 Hz, including harmonics but excluding dc. ABBREVIATIONS ADC Analog-to-Digital Converter. AFE Analog Front End. AGT Analog Gain Tap. ALB Analog Loop-Back. BW Bandwidth. CRx A Control Register where x is a placeholder for an alphabetic character (A–E). There are five read/ write control registers on the AD73322—desig- nated CRA through CRE. CRx:n A bit position, where n is a placeholder for a nu- meric character (0–7), within a control register, where x is a placeholder for an alphabetic charac- ter (A–E). Position 7 represents the MSB and Position 0 represents the LSB. DAC Digital-to-Analog Converter. DGT Digital Gain Tap. DLB Digital Loop-Back. DMCLK Device (Internal) Master Clock. This is the inter- nal master clock resulting from the external master clock (MCLK) being divided by the on-chip mas- ter clock divider. FS Full Scale. FSLB Frame Sync Loop-Back—where the SDOFS of the final device in a cascade is connected to the RFS and TFS of the DSP and the SDIFS of first device in the cascade. Data input and out- put occur simultaneously. In the case of Non- FSLB, SDOFS and SDO are connected to the Rx Port of the DSP while SDIFS and SDI are connected to the Tx Port. PGA Programmable Gain Amplifier. SC Switched Capacitor. SLB Sport Loop-Back SNR Signal-to-Noise Ratio. SPORT Serial Port. THD Total Harmonic Distortion. VBW Voice Bandwidth. |
Codice articolo simile - AD73322_17 |
|
Descrizione simile - AD73322_17 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEETIT.COM |
Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |