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RT5508 Scheda tecnica(PDF) 50 Page - Richtek Technology Corporation |
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RT5508 Scheda tecnica(HTML) 50 Page - Richtek Technology Corporation |
50 / 57 page RT5508 Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation www.richtek.com DS5508-01 March 2017 50 ADDR Byte Bits R/W Name Description Default 0xB5 1 7 R/W D_SPK_VREF_OCP_SEL OCP protection threshold level 0 : 1.8A 1 : 2.4A 0 6 R/W D_SPK_OCP_ANA_EN OCP protection sequence for discharge enable 1 5:2 R/W D_IB_DAC See the bit 1 of reg[0xB5]. 0 1 R/W MODE_IB_DAC reg[0xB5] instead of the data from OTP memory 0 0 R/W D_VBG_BUF_EN_ECO Used for VBST trim 0 0xC0 1 7 R/W otp_access_en Enable otp access 4'h0 6 - Reserved - 5 R otp_pon_rdy OTP power on auto load ready 1'b0 4:3 R/W otp_byte_num[1:0] otp access byte number 00: 1byte, 01: 2bytes, 10: 3bytes, 11: 4bytes 2'b00 2 R/W otp_wr 0 : read, 1 : write 1'b0 1:0 R/W otp_acmr[1:0] 00 : normal read/write 01 : accelerated program mode 10 : margin-1 read mode 11 : margin-2 read mode 2'b00 0xC1 2 15:11 - Reserved - 10:0 R/W otp_init_addr[10:0] otp access address 11'h0 0xC2 4 31:24 R/W otp_din3[7:0]/otp_dout3[7:0] Write mode : otp_din0~3 is written into OTP memory Read mode : OTP memory data is put into otp_dout0~3 8'b0 23:16 R/W otp_din2[7:0]/otp_dout2[7:0] 8'b0 15:8 R/W otp_din1[7:0]/otp_dout1[7:0] 8'b0 7:0 R/W otp_din0[7:0]/otp_dout0[7:0] 8'b0 0xC3 1 7:5 - Reserved - 0 4:0 R/W D_VBG_TRIM[4:0] Trim bits of BandGap 5'h10 0xC4 2 15:0 R/W VTEMP_TRIM[15:0] Calibration Result of VTEMP 0 0xC5 2 15:0 R/W TCOEFF[15:0] TC for iSense resistance 0 0xCF 1 7:0 R/W DRC_MIN_GAIN[7:0] 8'hFF 0xD0 1 7:4 - Reserved - 2'b00 3:0 R/W DRC_SET_SEL[3:0] 0000 : DRC1 0001 : DRC2 0010 : DRC3 0011 : DRC4 0100 : DRC5 Other : no define 4'h0 |
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