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FDG6318P Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor

Il numero della parte FDG6318P
Spiegazioni elettronici  Dual P-Channel, Digital FET
Download  5 Pages
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Produttore elettronici  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FDG6318P Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor

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FDG6318P Rev C (W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain–Source Breakdown
Voltage
VGS = 0 V,
ID = –250
µA
–20
V
∆BVDSS
∆T
J
Breakdown Voltage Temperature
Coefficient
ID = –250
µA, Referenced to 25°C
–10
mV/
°C
IDSS
Zero Gate Voltage Drain Current
VDS = –16 V, VGS = 0 V
–1
µA
IGSS
Gate–Body Leakage
VGS =
±12 V, V
DS = 0 V
±100
nA
On Characteristics
(Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS,
ID = –250
µA
–0.65
–1.2
–1.5
V
∆VGS(th)
∆T
J
Gate Threshold Voltage
Temperature Coefficient
ID = –250
µA, Referenced to 25°C
2
mV/
°C
RDS(on)
Static Drain–Source
On–Resistance
VGS = –4.5 V, ID = –0.5 A
VGS = –2.5 V, ID = –0.4 A
VGS = –4.5 V, ID = –0.5 A, TJ=125°C
580
980
780
780
1200
m
ID(on)
On–State Drain Current
VGS = –4.5 V, VDS = –5 V
–1.8
A
gFS
Forward Transconductance
VDS = –5 V,
ID = –0.5 A
1.1
S
Dynamic Characteristics
Ciss
Input Capacitance
83
pF
Coss
Output Capacitance
20
pF
Crss
Reverse Transfer Capacitance
VDS = –10 V, V GS = 0 V,
f = 1.0 MHz
11
pF
RG
Gate Resistance
VGS = 15 mV, f = 1.0 MHz
12.1
Switching Characteristics (Note 2)
td(on)
Turn–On Delay Time
6
12
ns
tr
Turn–On Rise Time
12
22
ns
td(off)
Turn–Off Delay Time
6
13
ns
tf
Turn–Off Fall Time
VDD = –10 V,
ID = 1 A,
VGS = –4.5 V, RGEN = 6
1
3
ns
Qg
Total Gate Charge
0.86
1.2
nC
Qgs
Gate–Source Charge
0.22
nC
Qgd
Gate–Drain Charge
VDS = –10 V, ID = –0.6 A,
VGS = –4.5 V
0.25
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
–0.25
A
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V,
IS = –0.25 A(Note 2)
–0.83
–1.2
V
trr
Reverse Recovery Time
12.6
ns
Qrr
Reverse Recovery Charge
IF = –0.5 A,
diF/dt = 100 A/µs
2.52
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design. RθJA = 415°C/W when mounted on a minimum pad .
2. Pulse Test: Pulse Width < 300
µs, Duty Cycle < 2.0%


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