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FDG6318PZ Scheda tecnica(PDF) 1 Page - Fairchild Semiconductor

Il numero della parte FDG6318PZ
Spiegazioni elettronici  Dual P-Channel, Digital FET
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Produttore elettronici  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FDG6318PZ Scheda tecnica(HTML) 1 Page - Fairchild Semiconductor

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©2003 Fairchild Semiconductor Corporation
January 2003
FDG6318PZ Rev. B
FDG6318PZ
Dual P-Channel, Digital FET
General Description
These dual P-Channel logic level enhancement mode
MOSFET are produced using Fairchild Semiconductor’s
especially tailored to minimize on-state resistance. This
device has been designed especially for bipolar digital
transistors and small signal MOSFETS
Applications
• Battery management
Features
• -0.5A, -20V.
rDS(ON) = 780mΩ (Max)@ VGS = -4.5 V
rDS(ON) = 1200mΩ (Max) @ VGS = -2.5 V
• Very low level gate drive requirements allowing direct
operation in 3V circuits (VGS(TH) < 1.5V).
• Gate-Source Zener for ESD ruggedness (>1.4kV Human
Body Model).
• Compact industry standard SC-70-6 surface mount
package.
MOSFET Maximum Ratings T
A=25°C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol
Parameter
Ratings
Units
VDSS
Drain to Source Voltage
-20
V
VGS
Gate to Source Voltage
±12
V
ID
Drain Current
-0.5
A
Continuous (TC = 25
oC, V
GS = - 4.5V)
Continuous (TC = 100
oC, V
GS = - 2.5V)
-0.3
A
Pulsed
Figure 4
PD
Power dissipation
0.3
W
Derate above 25°C
2.4
mW/
oC
TJ, TSTG
Operating and Storage Temperature
-55 to 150
oC
ESD
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model ( 100pF / 1500
Ω )
1.4
kV
RθJA
Thermal Resistance Junction to Ambient (Note 1)
415
oC/W
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
.68
FDG6318PZ
SC70-6
7”
8 mm
3000
S
G
D
D
G
S
Pin 1
SC70-6
The pinouts are symmetrical; pin1 and pin 4 are interchangeable.
S
G
D
D
G
S
6or 3
5or 2
4or 1
1or 4
2or 5
3or 6


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