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ACE8001MT8 Scheda tecnica(PDF) 11 Page - Fairchild Semiconductor

Il numero della parte ACE8001MT8
Spiegazioni elettronici  ACE8001 Product Family Arithmetic Controller Engine (ACEx?? for Low Power Applications
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Produttore elettronici  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

ACE8001MT8 Scheda tecnica(HTML) 11 Page - Fairchild Semiconductor

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ACE8001 Product Family Rev. B.2
4.0 Arithmetic Controller Core
The ACEx microcontroller core is specifically designed for low
cost applications involving bit manipulation, shifting and arith-
metic operations. It is based on a modified Harvard architecture
meaning peripheral, I/O, and RAM locations are addressed sep-
arately from instruction data.
The core differs from the traditional Harvard architecture by
aligning the data and instruction memory sequentially. This
allows the X-pointer (11-bits) to point to any memory location in
either segment of the memory map. This modification improves
the overall code efficiency of the core and takes advantage of
the flexibility found on Von Neumann style machines.
4.1 CPU Registers
The ACEx microcontroller has five general-purpose registers.
These registers are the Accumulator (A), X-Pointer (X), Pro-
gram Counter (PC), Stack Pointer (SP), and Status Register
(SR). The X, SP, and SR registers are all memory-mapped.
Figure 11: Programming Model
8-bit accumulator register
11-bit X pointer register
10-bit program counter
4-bit stack pointer
8-bit status register
NEGATIVE flag
HALF CARRY flag (from bit 3)
CARRY flag (from MSB)
ZERO flag
GLOBAL Interrupt Mask
READY flag (from EEPROM)
A
X
PC
SP
SR
0
0
0
0
N
H
C
Z
G
0
0
R
7
10
9
3


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