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HT82B40R Scheda tecnica(PDF) 8 Page - Holtek Semiconductor Inc

Il numero della parte HT82B40R
Spiegazioni elettronici  I/O 8-Bit MCU with USB Interface
Download  54 Pages
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Produttore elettronici  HOLTEK [Holtek Semiconductor Inc]
Homepage  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT82B40R Scheda tecnica(HTML) 8 Page - Holtek Semiconductor Inc

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HT82B40R/HT82B40A
Rev. 1.70
8
November 5, 2014
· Rotation RRA, RR, RRCA, RRC, RLA, RL, RLCA,
RLC
· Increment and Decrement INCA, INC, DECA, DEC
· Branch decision, JMP, SZ, SZA, SNZ, SIZ, SDZ,
SIZA, SDZA, CALL, RET, RETI
Program Memory
The Program Memory is the location where the user code
or program is stored. The HT82B40R is a One-Time Pro-
grammable, OTP, memory type device where users can
program their application code into the device. By using
the appropriate programming tools, OTP devices offer
users the flexibility to freely develop their applications
which may be useful during debug or for products requir-
ing frequent upgrades or program changes. OTP devices
are also applicable for use in applications that require low
or medium volume production runs. The HT82B40A is a
Mask memory type device and offers the most cost effec-
tive solution for high volume products.
Structure
The Program Memory has a capacity of 4K by 15 bits.
The Program Memory is addressed by the Program
Counter and also contains data, table information and
interrupt entries. Table data, which can be setup in any
location within the Program Memory, is addressed by
separate table pointer registers.
Special Vectors
Within the Program Memory, certain locations are re-
served for special usage such as reset and interrupts.
· Location 000H
This area is reserved for program initialization. After
chip reset, the program always begins execution at lo-
cation 000H.
· Location 004H
This area is reserved for the USB interrupt service
program. If the USB interrupt is activated, the interrupt
is enabled and the stack is not full, the program jumps
to this location and begins execution.
· Location 008H
This area is reserved for the Timer/Event Counter 0 in-
terrupt service program. If a timer interrupt results
from a Timer/Event Counter 0 overflow, and if the in-
terrupt is enabled and the stack is not full, the program
jumps to this location and begins execution.
· Location 00CH
This area is reserved for the Timer/Event Counter 1 in-
terrupt service program. If a timer interrupt results
from a Timer/Event Counter 1 overflow, and the inter-
rupt is enabled and the stack is not full, the program
jumps to this location and begins execution.
· Table location
Any location in the program memory can be used as
look-up tables. There are three methods to read the
Program Memory data using two table read instruc-
tions:
²TABRDC² and ²TABRDL², transfer the con-
tents of the lower-order byte to the specified data
memory, and the higher-order byte to TBLH (08H).
The three methods are shown as follows:
¨ Using the instruction
²TABRDC [m]² for the current
Program Memory page, where one page=
256words, where the table location is defined by
TBLP in the current page. This is where the config-
uration option has disabled the TBHP register.
¨ Using the instruction
²TABRDC [m]², where the ta-
ble location is defined by registers TBLP and TBHP.
Here the configuration option has enabled the
TBHP register.
¨ Using the instruction
²TABRDL [m]², where the ta-
ble location is defined by registers TBLP in the last
page which has the address range 0F00H~0FFFH.
Only the destination of the lower-order byte in the ta-
ble is well-defined, the other bits of the table word are
transferred to the lower portion of TBLH, and the re-
maining 1-bit words are read as
²0². The Table
Higher-order byte register (TBLH) is read only. The ta-
ble pointers, TBLP and TBHP, are read/write regis-
ters, which indicate the table location. Before
accessing the the table, the locations must be placed
F F F H
1 5 b i t s
U S B
I n t e r r u p t V e c t o r
T i m e r / E v e n t 0 C o u n t e r
I n t e r r u p t V e c t o r
0 0 4 H
0 0 8 H
0 0 C H
I n i t i a l i s a t i o n
V e c t o r
0 0 0 H
T i m e r / E v e n t 1 C o u n t e r
I n t e r r u p t V e c t o r
Program Memory Structure
Instruction
Table Location Bits
b11
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
TABRDC[m]
PC11
PC10
PC9
PC8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1111
@7
@6
@5
@4
@3
@2
@1
@0
Table Location
Note:
PC11~PC8: Current Program Counter bits
TBHP register Bit 3 ~ Bit 0 when TBHP is enabled.
@7~@0: Table Pointer TBLP bits


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