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HT48R002 Scheda tecnica(PDF) 40 Page - Holtek Semiconductor Inc |
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HT48R002 Scheda tecnica(HTML) 40 Page - Holtek Semiconductor Inc |
40 / 71 page Rev. 1.11 40 April 11, 2017 Rev. 1.11 41 April 11, 2017 HT48R002/HT48R003 Cost-Effective I/O 8-Bit OTP MCU HT48R002/HT48R003 Cost-Effective I/O 8-Bit OTP MCU TMR0C Register Bit 7 6 5 4 3 2 1 0 Name T0M1 T0M0 — T0ON T0EG T0PSC2 T0PSC1 T0PSC0 R/W R/W R/W — R/W R/W R/W R/W R/W POR 0 0 — 0 1 0 0 0 Bit7~6 T0M1~T0M0:Timeroperationmodeselection 00:Nomodeavailable 01:Eventcountermode 10:Timermode 11:Pulsewidthcapturemode Bit5 Unimplemented,readas"0" Bit4 T0ON:Timer/eventcountercountingenable 0:Disable 1:Enable Bit3 T0EG:Timer/EventCounteractiveedgeselection Ineventcountermode(T0M1~T0M0=01) 0:Countonrisingedge 1:Countonfallingedge Inpulsewidthmeasurementmode(T0M1~T0M0=11) 0:Startcountingonfallingedge,stopontherisingedge 1:Startcountingonrisingedge,stoponthefallingedge Bit2~0 T0PSC2~T0PSC0:Timerprescalarrateselection 000:fS 001:fS/2 010:fS/4 011:fS/8 100:fS/16 101:fS/32 110:fS/64 111:fS/128 Timer Mode Inthismode,theTimer/EventCountercanbeutilizedtomeasurefixedtimeintervals,providing aninternalinterruptsignaleachtimetheTimer/EventCounteroverflows.Tooperateinthismode, theOperatingModeSelectbitpair,T0M1/T0M0,intheTimerControlRegistermustbesettothe correctvalueasshown. Bit7 Bit6 1 0 Control Register Operating Mode Select Bits for the Timer Mode Inthismodetheinternalclockisusedasthetimerclock.ThetimerinputclocksourceisfSYSor fSYS/4.However,thistimerclocksourceisfurtherdividedbyaprescaler,thevalueofwhichis determinedbythebitsT0PSC2~T0PSC0intheTimerControlRegister.Thetimer-onbit,T0ON mustbesethightoenablethetimertorun.Eachtimeaninternalclockhightolowtransitionoccurs, thetimerincrementsbyone.Whenthetimerisfullandoverflows,aninterruptsignalisgenerated andthetimerwillreloadthevaluealreadyloadedintothepreloadregisterandcontinuecounting. Atimeroverflowconditionandcorrespondinginternalinterruptsaretwoofthewake-upsources. However,theinternalinterruptscanbedisabledbyensuringthattheT0EbitsoftheINTC0register areresettozero. |
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