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HT46R064 Scheda tecnica(PDF) 61 Page - Holtek Semiconductor Inc |
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HT46R064 Scheda tecnica(HTML) 61 Page - Holtek Semiconductor Inc |
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61 / 101 page  HT46R064/065/066/0662/067 Rev. 1.30 61 January 22, 2013 External Interrupt For an external interrupt to occur, the global interrupt en- able bit, EMI, and external interrupt enable bit, INTE, must first be set. An actual external interrupt will take place when the external interrupt request flag, INTF, is set, a situation that will occur when an edge transition appears on the external INT line. The type of transition that will trigger an external interrupt, whether high to low, low to high or both is determined by the INTEG0 and INTEG1 bits, which are bits 6 and 7 respectively, in the CTRL1 control register. These two bits can also disable the external interrupt function. INTEG1 INTEG0 Edge Trigger Type 0 0 External interrupt disable 0 1 Rising edge Trigger 1 0 Falling edge Trigger 1 1 Both edge Trigger The external interrupt pin is pin-shared with the I/O pin PA3 and can only be configured as an external interrupt pin if the corresponding external interrupt enable bit in the INTC0 register has been set and the edge trigger type has been selected using the CTRL1 register. The pin must also be setup as an input by setting the corre- sponding PAC.3 bit in the port control register. When the interrupt is enabled, the stack is not full and a transition appears on the external interrupt pin, a subroutine call to the external interrupt vector at location 04H, will take place. When the interrupt is serviced, the external inter- rupt request flag, INTF, will be automatically reset and the EMI bit will be automatically cleared to disable other interrupts. Note that any pull-high resistor connections on this pin will remain valid even if the pin is used as an external interrupt input. · HT46R064 ¨ INTC0 Register Bit 76543210 Name ¾ ADF T0F INTF ADE T0E INTE EMI R/W ¾ R/W R/W R/W R/W R/W R/W R/W POR ¾ 0000000 Bit 7 unimplemented, read as ²0² Bit 6 ADF: A/D Conversion interrupt request flag 0: inactive 1: active Bit 5 T0F: Timer/Event Counter 0 interrupt request flag 0: inactive 1: active Bit 4 INTF: External interrupt request flag 0: inactive 1: active Bit 3 ADE: A/D Conversion interrupt enable 0: disable 1: enable Bit 2 T0E: Timer/Event Counter 0 interrupt enable 0: disable 1: enable Bit 1 INTE: external interrupt enable 0: disable 1: enable Bit 0 EMI: Master interrupt global enable 0: disable 1: enable |
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