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HT37B90 Scheda tecnica(PDF) 44 Page - Holtek Semiconductor Inc |
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HT37B90 Scheda tecnica(HTML) 44 Page - Holtek Semiconductor Inc |
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44 / 80 page  HT37B90/HT37B70/HT37B50/HT37B30 Rev.1.00 44 June22,2017 WatchdogTimerOscillator The WDT oscillator is a fully self-contained free running on-chip RC oscillator with a typical period of 65 ms at 5V requiring no external components. When the device en- ters the Power Down Mode, the system clock will stop running but the WDT oscillator continues to free-run and to keep the watchdog active. However, to preserve power in certain applications the WDT oscillator can be disabledviaaconfigurationoption. PowerDownModeandWake-up PowerDownMode All of the Holtek microcontrollers have the ability to enter a Power Down Mode, also known as the HALT Mode or Sleep Mode. When the device enters this mode, the nor- mal operating current, will be reduced to an extremely low standby current level. This occurs because when the device enters the Power Down Mode, the system oscillator is stopped which reduces the power consump- tion to extremely low levels, however, as the device maintains its present internal condition, it can be woken up at a later stage and continue running, without requir- ing a full reset. This feature is extremely important in ap- plication areas where the MCU must have its power supply constantly maintained to keep the device in a known condition but where the power supply capacity is limitedsuchasinbatteryapplications. EnteringthePowerDownMode There is only one way for the device to enter the Power Down Mode and that is to execute the ²HALT² instruc- tion in the application program. When this instruction is executed,thefollowingwilloccur: · The system oscillator will stop running and the appli- cationprogramwillstopatthe ²HALT² instruction. · The Data Memory contents and registers will maintain theirpresentcondition. · The WDT will be cleared and resume counting if the WDT clock source is selected to come from the WDT oscillator. The WDT will stop if its clock source origi- natesfromthesystemclock. · TheI/Oportswillmaintaintheirpresentcondition. · In the status register, the Power Down flag, PDF, will be set and the Watchdog time-out flag, TO, will be cleared. StandbyCurrentConsiderations As the main reason for entering the Power Down Mode is to keep the current consumption of the MCU to as low a value as possible, perhaps only in the order of several micro-amps, there are other considerations which must also be taken into account by the circuit designer if the power consumption is to be minimized. Special atten- tion must be made to the I/O pins on the device. All high-impedance input pins must be connected to either a fixed high or low level as any floating input pins could create internal oscillations and result in increased cur- rent consumption. This also applies to devices which have different package types, as there may be undonbed pins, which must either be setup as outputs or if setup as inputs must have pull-high resistors con- nected. Care must also be taken with the loads, which are connected to I/O pins, which are setup as outputs. These should be placed in a condition in which minimum current is drawn or connected only to external circuits that do not draw current, such as other CMOS inputs. Also note that additional standby current will also be re- quired if the configuration options have enabled the WatchdogTimerinternaloscillator. Wake-up After the system enters the Power Down Mode, it can be woken up from one of various sources listed as follows: · Anexternalreset · AnexternalfallingedgeonPortA · Asysteminterrupt · A WDT overflow If the system is woken up by an external reset, the de- vice will experience a full system reset, however, if the device is woken up by a WDT overflow, a Watchdog Timer reset will be initiated. Although both of these wake-up methods will initiate a reset operation, the ac- tual source of the wake-up can be determined by exam- ining the TO and PDF flags. The PDF flag is cleared by a system power-up or executing the clear Watchdog Timer instructions and is set when executing the ²HALT² instruction. The TO flag is set if a WDT time-out occurs, and causes a wake-up that only resets the Program Counter and Stack Pointer, the other flags remain in theiroriginalstatus. Each pin on Port A can be setup via an individual config- uration option to permit a negative transition on the pin to wake-up the system. When a Port A pin wake-up oc- curs, the program will resume execution at the instruc- tionfollowingthe ²HALT² instruction. If the system is woken up by an interrupt, then two possi- ble situations may occur. The first is where the related interrupt is disabled or the interrupt is enabled but the stack is full, in which case the program will resume exe- cution at the instruction following the ²HALT² instruction. In this situation, the interrupt which woke-up the device will not be immediately serviced, but will rather be ser- viced later when the related interrupt is finally enabled or when a stack level becomes free. The other situation is where the related interrupt is enabled and the stack is not full, in which case the regular interrupt response takes place. If an interrupt request flag is set to ²1² be- fore entering the Power Down Mode, the wake-up func- tionoftherelatedinterruptwillbedisabled. |
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