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HT37B90 Scheda tecnica(PDF) 24 Page - Holtek Semiconductor Inc |
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HT37B90 Scheda tecnica(HTML) 24 Page - Holtek Semiconductor Inc |
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24 / 80 page  HT37B90/HT37B70/HT37B50/HT37B30 Rev.1.00 24 June22,2017 ConfiguringtheTimer/EventCounterInputClock Source The internal timer ¢s clock can originate from various sources, depending upon timer is chosen. The system clock input timer source is used when the timer is in the timermodeorinthepulsewidthmeasurementmode. For Timer/Event Counter 0, these system clock timer sourceisselectedbyTMR0C.5. For Timer/Event Counter 1, 2 this system clock timer source is first divided by a prescaler, the division ratio of which is conditioned by the Timer Control Register bits T1PSC0~T1PSC2. An external clock source is used when the timer is in the event counting mode, the clock source being provided on the external timer pin, known as TMR0 or TMR1. These external timer pins are pin-shared with other I/O pins. Depending upon the condition of PA share pin op- tion, each high to low, or low to high transition on the ex- ternaltimerinputpinwillincrementthecounterbyone. TimerRegisters - TMR0H/TMR0L,TMR1,TMR2 The timer registers are special function registers located in the special purpose Data Memory and is the place where the actual timer value is stored. For the 8-bit timer, this register is known as Timer/Event Counter 1/2. In the case of the 16-bit timer, a pair of 8-bit registers are re- quired to store the 16-bit timer values. These are known as TMR1L/TMR1H. The value in the timer registers in- creases by one each time an internal clock pulse is re- ceived or an external transition occurs on the external timer pin. The timer will count from the initial value loaded by the preload register to the full count of FFH for the 8-bit timer or FFFFH for the 16-bit timers, at which point the timer overflows and a timer internal interrupt signal is generated. The timer value will then be reset with the ini- tial preload register value and continue counting. Note that to achieve a maximum full range count of FFH for the 8-bit timer or FFFFH for the 16-bit timers, the preload registers must first be cleared to all zeros. It should be noted that after power-on, the preload regis- ters will be in an unknown condition. Note that if the Timer/Event Counters are in an OFF condition and data is written to their preload registers, this data will be im- mediately written into the actual counter. However, if the counter is enabled and counting, any new data written into the preload data register during this period will re- main in the preload register and will only be written into the actual counter the next time an overflow occurs. Note also that when the timer registers are read, the timer clock will be blocked to avoid errors, however, as this may result in certain timing errors, programmers musttakethisintoaccount. The 16-bit Timer/Event Counter have contained both low byte and high byte timer registers, accessing these registers is carried out in a specific way. It must be noted that when using instructions to preload data into the low byte register, namely TMR0L, the data will only be placed in a low byte buffer and not directly into the low byte register. The actual transfer of the data into the low byte register is only carried out when a write to its asso- ciated high byte register, namely TMR0H, is executed. On the other hand, using instructions to preload data into the high byte timer register will result in the data be- ing directly written to the high byte register. At the same time the data in the low byte buffer will be transferred into its associated low byte register. For this reason, when preloading data into the 16-bit timer registers, the low byte should be written first. It must also be noted that to read the contents of the low byte register, a read to the b 7 T 0 E T 0 O N T 0 M 0 T 0 M 1 b 0 E v e n t C o u n t e r A c t i v e E d g e S e l e c t 1 : c o u n t o n f a l l i n g e d g e 0 : c o u n t o n r i s i n g e d g e T i m e r / E v e n t C o u n t e r C o u n t i n g E n a b l e 1 : e n a b l e 0 : d i s a b l e O p e r a t i n g M o d e S e l e c t T 0 M 1 0 0 1 1 T 0 M 0 0 1 0 1 n o m o d e a v a i l a b l e e v e n t c o u n t e r m o d e t i m e r m o d e p u l s e w i d t h m e a s u r e m e n t m o d e P u l s e W i d t h M e a s u r e m e n t A c t i v e E d g e S e l e c t 1 : s t a r t c o u n t i n g o n r i s i n g e d g e , s t o p o n f a l l i n g e d g e 0 : s t a r t c o u n t i n g o n f a l l i n g e d g e , s t o p o n r i s i n g e d g e T M R 0 C R e g i s t e r N o t i m p l e m e n t e d , r e a d a s " 0 " T 0 S T i m e r C l o c k S o u r c e 1 : R C 1 2 K 0 : f O S C / 8 Timer/EventCounter0ControlRegister |
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