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TP3410 Scheda tecnica(PDF) 11 Page - National Semiconductor (TI) |
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TP3410 Scheda tecnica(HTML) 11 Page - National Semiconductor (TI) |
11 / 32 page Functional Description (Continued) 61 FS Relationship To Data (Microwire Mode) For applications on a line-card in DSI Slave Mode the B and D channel slots can be interfaced to a Time-Division Multiplexed (TDM) bus and assigned to a time-slot The rep- etition rate of the FS input signals must be 8 kHz and must be synchronized to the BCLK input which may be any fre- quency from 256 kHz to 4096 MHz in 8 kHz increments Two different relationships may be established between the FS inputs and the actual time-slots on the PCM busses by setting the DDM bit in Control Register CR1 see Figures 3 11 and 12 Non-delayed data mode is similar to long frame timing on the TP305060 series of devices (COMBO I) the time-slots are defined by the 8-bit duration FSa and FSb signals The alternative is to use Delayed Data Mode which is similar to short frame sync timing on COMBO I in which each FS input indicates the start of the first time-slot Serial B channel data is shifted into the Bx input during each assigned Transmit time-slot on the falling edges of BCLK During each assigned Receive time-slot the Br output shifts data out on the rising edges of BCLK Also with the device in LT Mode the TSr pin is an open drain n-channel pull- down output which goes low during the selected time-slots for the received B1 and B2 channels at the Br pin to control the TRI-STATE Enable of a backplane line-driver it is high- impedance at all other times In NT Mode when DSI Master mode is selected FSa and FSb are outputs indicating the B1 (or TS0) and the B2 (or TS1) channels respectively BCLK is also an output at the serial data shift rate which is dependent on the format se- lected Again either a delayed or non-delayed relationship between FSa FSb and the start of the first time-slot can be selected 62 B Channel Time-slot Assignment Format 3 Only (Microwire Mode) In Format 3 only the TP3410 provides programmable time- slot assignment for selecting the Transmit and Receive B channel time-slots Following power-on the device is auto- matically in Non-delayed Data Mode if Delayed Data Mode is required it must first be selected (see CR1) prior to using Time-slot Assignment and the FS pulses must conform to the Delayed Data timing format The actual transmit and receive time-slots are then determined by the internal Time- slot Assignment counters programmed via Control Regis- ters TXB1 TXB2 RXB1 and RXB2 Normally used in DSI Slave mode Format 3 allows a frame to consist of up to 64 time-slots of 8 bits each with BCLK up to 4096 MHz A new assignment becomes active on the second frame following the end of the 16-bit Chip Select 63 D Channel Port Selection (Microwire Mode) In any of the DSI Formats the 2 D channel bits per frame may either be multiplexed with the B channels on the Bx and Br pins or may be accessed via the separate D channel port consisting of Dx and Dr Furthermore when using the separate D port the data shift clock may either be a continu- ous unframed data stream using the 16 kHz clock output at DCLK see Figure 4 or may use the BCLK see Figure 5 Selection of these options is via Control Register CR2 64 D Channel Time-Slot Assignment In addition to B channel TSA Format 3 allows independent Time Slot Assignment for the Transmit and Receive D chan- nels which may be programmed via Registers TXD and RXD As with the B channels up to 64 time-slots are avail- able if BCLK e 4096 MHz and in addition the 2 D bits may be assigned in pairs to specific bit locations within the time-slot that is in bits 1 and 2 3 and 4 5 and 6 or 7 and 8 D channel TSA may be used either with the D channel multi- plexed with the B channel data or with the separate D Channel port clocked with BCLK it cannot be used with the 16 kHz clock option at DCLK Summary of DSI Slave Mode Options Function Format Number 1 234 FSa Tx B1 Tx B1 Tx TS0 Tx B1 FSb Rx B1 Rx B1 Rx TS0 Rx B1 Non-Delayed Timing Yes No Yes Yes Delayed Timing Yes Yes Yes No Tx and Rx Frames with Yes Yes Yes Yes Any Phase TSA Available No No Yes No D Port Available Yes Yes Yes Yes Summary of DSI Master Mode Options Function Format Number 1234 FSa B1 B1 TS0 B1 FSb B2 B2 TS1 B2 FS Formats Non- Delayed Non- Non- Delayed Only Delayed Delayed and and Only Delayed Delayed TSA Available No No Yes No D Port Available Yes Yes Yes Yes Note All Formats Tx and Rx frames always aligned TLH9151 – 11 FIGURE 4 D-Port Interface Timing Using DCLK in 16 kHz Mode 11 |
Codice articolo simile - TP3410 |
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Descrizione simile - TP3410 |
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