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FDG901 Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor |
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FDG901 Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor |
2 / 6 page FDG901D rev. D (W) Electrical Characteristics T A = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Logic Levels VIH Logic HIGH Input Voltage VDD = 2.70V to 6.0 V 75% of VDD V VIL Logic LOW Input Voltage VDD = 2.70V to 6.0 V 25% of VDD V OFF Characteristics BVIN Logic Input Breakdown Voltage IIN = 10 µA, VSLEW = 0 V 9 V BVSLEW Slew Input Breakdown Voltage ISLEW = 10 µA, VIN = 0 V 9 V BVDG Supply Input Breakdown Voltage IDG = 10 µA, VIN = 0 V, VSLEW = 0 V 9 V IRIN LOGIC Input Leakage Current VIN = 8 V, VSLEW = 0 V 100 nA IRSLEW SLEW Input Leakage Current VSLEW = 8 V, VIN = 0 V 100 nA IRDG Supply Input Leakage Current VDG = 8 V, VIN = 0 V, VSLEW = 0 V 100 nA ON Characteristics IG Gate Current SLEW = OPEN 90 120 µA SLEW = GND 1 10 µA VIN = 6V VGATE = 2V SLEW = VDD 10 50 nA Switching Characteristics tdon Output Turn-On Delay Time Slew Pin = OPEN 8.3 µs tdon Output Turn-On Delay Time Slew Pin = GROUND 0.6 ms tdon Output Turn-On Delay Time Slew Pin = VDD VSupply = 5.5 V, VDD = 5.5 V, Logic IN = 5.5 V, CLOAD = 510 pF, Test Circuit 2.2 ms trise Output Rise Time Slew Pin = OPEN 28 µs trise Output Rise Time Slew Pin = GROUND 1.8 ms trise Output Rise Time Slew Pin = VDD VSupply = 5.5 V, VDD = 5.5 V, Logic IN = 5.5 V, CLOAD = 510 pF, Test Circuit 11 ms dv/dt Output Slew Rate Slew Pin = OPEN 162 V/ms dv/dt Output Slew Rate Slew Pin = GROUND 2.6 V/ms dv/dt Output Slew Rate Slew Pin = VDD VSupply = 5.5 V, VDD = 5.5 V, Logic IN = 5.5 V, CLOAD = 510 pF, Test Circuit 0.3 V/ms Notes: R θJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θJC is guaranteed by design while RθCA is determined by the user's board design. LOGIC IN VDD SLEW V SUPPLY C Load Test Circuit 1 2 4 3 5 LOGIC IN VDD SLEW V SUPPLY C Load Test Circuit 1 2 4 3 5 tdon trise 10% 10% 90% LOGIC IN OUTPUT (Inverted) Switching Waveforms tdon trise 10% 10% 90% LOGIC IN OUTPUT (Inverted) Switching Waveforms |
Codice articolo simile - FDG901 |
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Descrizione simile - FDG901 |
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