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MC14027BDG Scheda tecnica(PDF) 5 Page - ON Semiconductor |
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MC14027BDG Scheda tecnica(HTML) 5 Page - ON Semiconductor |
5 / 6 page MC14027B http://onsemi.com 5 Figure 1. Dynamic Signal Waveforms (J, K, Clock, and Output) Figure 2. Dynamic Signal Waveforms (Set, Reset, Clock, and Output) 20 ns 20 ns VDD VSS VDD VSS VDD VSS VOH VOL 90% 50% 10% 20 ns 20 ns tsu 90% 50% 10% tsu th 20 ns 20 ns 90% 50% 10% tWL tWH 1 fcl tPLH tPHL 90% 50% 10% tTLH tTHL Q C K J Inputs R and S low. For the measurement of tWH, I/fcl, and PD the Inputs J and K are kept high. 20 ns 20 ns 90% 50% 10% VDD VSS VDD VSS VOH VOL trem tw 20 ns 20 ns 90% 50% 10% tw tPLH tPHL 50% Q or Q CLOCK SET OR RESET LOGIC DIAGRAM (1/2 of Device Shown) S J K R CC C C C C C C C C C Q Q |
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