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932SQ426 Scheda tecnica(PDF) 4 Page - Integrated Device Technology |
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932SQ426 Scheda tecnica(HTML) 4 Page - Integrated Device Technology |
4 / 25 page 932SQ426 CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING IDT® CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING 4 932SQ426 REV C 022916 Pin Descriptions (TSSOP, cont.) PIN # PIN NAME TYPE DESCRIPTION 41 NS_SRC0C OUT Complementary clock of differential non-spreading SRC output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 42 NS_SRC0T OUT True clock of differential non-spreading SRC output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 43 NS_SRC1C OUT Complementary clock of differential non-spreading SRC output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 44 NS_SRC1T OUT True clock of differential non-spreading SRC output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 45 VDDNS PWR 3.3V power for the Non-Spreading differential outputs outputs and logic 46 GNDNS PWR Ground pin for non-spreading differential outputs and logic. 47 NS_SAS0C OUT Complementary clock of differentia non-spreading SAS output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 48 NS_SAS0T OUT True clock of differential non-spreading SAS output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 49 NS_SAS1C OUT Complementary clock of differentia non-spreading SAS output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 50 NS_SAS1T OUT True clock of differential non-spreading SAS output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 51 AVDD_NS_SAS PWR 3.3V power for the non-spreading SAS/SRC PLL analog circuits. 52 GNDNS PWR Ground pin for non-spreading differential outputs and logic. 53 CPU0C OUT Complementary clock of differential CPU output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 54 CPU0T OUT True clock of differential CPU output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 55 CPU1C OUT Complementary clock of differential CPU output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 56 CPU1T OUT True clock of differential CPU output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 57 VDDCPU PWR 3.3V power for the CPU outputs and logic 58 GNDCPU PWR Ground pin for CPU outputs and logic. 59 CPU2C OUT Complementary clock of differential CPU output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 60 CPU2T OUT True clock of differential CPU output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 61 CPU3C OUT Complementary clock of differential CPU output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 62 CPU3T OUT True clock of differential CPU output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 63 VDDCPU PWR 3.3V power for the CPU outputs and logic 64 SMBDAT I/O Data pin of SMBUS circuitry, 5V tolerant |
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