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FDC6333C Scheda tecnica(PDF) 1 Page - Fairchild Semiconductor |
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FDC6333C Scheda tecnica(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page October 2001 ©2001 Fairchild Semiconductor Corporation FDC6333C Rev C (W) FDC6333C 30V N & P-Channel PowerTrench ® ® MOSFETs General Description These N & P-Channel MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. These devices have been designed to offer exceptional power dissipation in a very small footprint for applications where the bigger more expensive SO-8 and TSSOP-8 packages are impractical. Applications • DC/DC converter • Load switch • LCD display inverter Features • Q1 2.5 A, 30V. RDS(ON) = 95 m Ω @ V GS = 10 V RDS(ON) = 150 m Ω @ V GS = 4.5 V • Q2 –2.0 A, 30V. RDS(ON) = 150 m Ω @ V GS = –10 V RDS(ON) = 220 m Ω @ V GS = –4.5 V • Low gate charge • High performance trench technology for extremely low RDS(ON). • SuperSOT –6 package: small footprint (72% smaller than SO-8); low profile (1mm thick). D1 S2 G1 D2 S1 G2 SuperSOT -6 TM Pin 1 SuperSOT™-6 3 2 1 4 5 6 Q1(N) Q2(P) Absolute Maximum Ratings TA=25 oC unless otherwise noted Symbol Parameter Q1 Q2 Units VDSS Drain-Source Voltage 30 –30 V VGSS Gate-Source Voltage ±16 ±25 V ID Drain Current – Continuous (Note 1a) 2.5 –2.0 A – Pulsed 8 –8 Power Dissipation for Single Operation (Note 1a) 0.96 (Note 1b) 0.9 PD (Note 1c) 0.7 W TJ, TSTG Operating and Storage Junction Temperature Range –55 to +150 °C Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 130 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 60 °C/W Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity .333 FDC6333C 7’’ 8mm 3000 units |
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