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8T73S208B-01NLGI Scheda tecnica(PDF) 2 Page - Integrated Device Technology

Il numero della parte 8T73S208B-01NLGI
Spiegazioni elettronici  2.5 V, 3.3 V Differential LVPECL Clock Divider and Fanout Buffer
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Produttore elettronici  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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©2016 Integrated Device Technology, Inc.
April 28, 2016
8T73S208B-01 Datasheet
Pin Descriptions and Pin Characteristics
Table 1. Pin Descriptions
NOTE: Pulldown and Pullup refers to an internal input resistors. See Section, “Table 2. Pin Characteristics” values.
Table 2. Pin Characteristics
Number
Name
Type
Description
1,
32
ADR1, ADR0
Input
Pulldown
I2C Address inputs. LVCMOS/LVTTL interface levels.
2, 7, 18, 23
VEE
Power
Negative supply pins.
3, 4
Q0, nQ0
Output
Differential output pair 0. LVPECL interface levels.
5, 6
Q1, nQ1
Output
Differential output pair 1. LVPECL interface levels.
8, 17
VCCO
Power
Output supply pins.
9, 10
Q2, nQ2
Output
Differential output pair 2. LVPECL interface levels.
11, 12
Q3, nQ3
Output
Differential output pair 3. LVPECL interface levels.
13, 14
Q4, nQ4
Output
Differential output pair 4. LVPECL interface levels.
15, 16
Q5, nQ5
Output
Differential output pair 5. LVPECL interface levels.
19, 20
Q6, nQ6
Output
Differential output pair 6. LVPECL interface levels.
21, 22
Q7, nQ7
Output
Differential output pair 7. LVPECL interface levels.
24,
25
FSEL0,
FSEL1
Input
Pulldown
Frequency divider select controls. See Table 3A for function.
LVCMOS/LVTTL interface levels.
26
IN
Input
Non-inverting differential clock input. RT = 50
 termination to V
T.
27
VT
Termination
Input
Input for termination. Both IN and nIN inputs are internally terminated 50
to this pin. See input termination information in Section, “Applications
Information”.
28
nIN
Input
Inverting differential clock input. RT = 50
 termination to V
T.
29
VCC
Power
Power supply pin.
30
SDA
I/O
Pullup
I2C Data Input/Output. Input: LVCMOS/LVTTL interface levels. Output:
open drain.
31
SCL
Input
Pullup
I2C Clock Input. LVCMOS/LVTTL interface levels.
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
CIN
Input Capacitance
2
pF
RPULLDOWN
Input Pulldown Resistor
51
k
RPULLUP
Input Pullup Resistor
51
k


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