MC100LVEL30

www.onsemi.com

2

D1

Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View)

R0

R1

D2

17

18

16

15

14

13

12

4

3

5678

9

Q0

11

10

Q1

Q1

Q2

D0

19

20

2

1

Q0

CLK0

CLK1

S012

CLK2 R2

D

R

S

Q

Q

D

R

S

Q

Q

D

R

S

Q

Q

Power Supply to guarantee proper operation.

R

L

L

H

L

H

Table 1. TRUTH TABLE

S

L

L

L

H

H

D

L

H

X

X

X

CLK

Z

Z

X

X

X

Q

L

H

L

H

Undef

Z = LOW to HIGH Transition

X = Don’t Care

Q

H

L

H

L

Undef

Table 2. PIN DESCRIPTION

FUNCTION

ECL Data Inputs

ECL Reset Inputs

ECL Clock Inputs

ECL Common Set Input

ECL Differential Data Outputs

Positive Supply

Negative Supply

PIN

D0−D2

R0−R2

CLK0−CLK2

S012

Q0−Q2; Q0−Q2

Table 3. MAXIMUM RATINGS

Symbol

Parameter

Condition 1

Condition 2

Rating

Unit

PECL Mode Power Supply

8 to 0

V

NECL Mode Power Supply

−8 to 0

V

PECL Mode Input Voltage

NECL Mode Input Voltage

6 to 0

−6 to 0

V

Output Current

Continuous

Surge

50

100

mA

Operating Temperature Range

−40 to +85

°C

Storage Temperature Range

−65 to +150

°C

Thermal Resistance (Junction-to-Ambient)

0 lfpm

500 lfpm

SOIC−20 WB

SOIC−20 WB

90

60

°C/W

Thermal Resistance (Junction-to-Case)

Standard Board

SOIC−20 WB

30 to 35

°C/W

Wave Solder

< 2 to 3 sec @ 248°C

265

°C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.