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MC10E404FNG Scheda tecnica(PDF) 5 Page - ON Semiconductor |
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MC10E404FNG Scheda tecnica(HTML) 5 Page - ON Semiconductor |
5 / 7 page MC10E404, MC100E404 www.onsemi.com 5 Table 8. AC CHARACTERISTICS (VCCx = 5.0 V; VEE = 0.0 V or VCCx = 0.0 V; VEE = −5.0 V (Note 1)) Symbol Characteristic 0°C 25°C 85°C Unit Min Typ Max Min Typ Max Min Typ Max fMAX Maximum Toggle Frequency 900 900 900 MHz TPLH tPHL Propagation Delay to Output Da (Diff) Da (SE) Db (Diff) Db (SE) 350 300 375 325 475 500 500 650 700 675 725 350 300 375 325 475 500 500 650 700 675 725 350 300 375 325 475 500 500 650 700 675 725 ps tSKEW Within-Device Skew (Note 2) 50 50 50 ps tJITTER Random Clock Jitter (RMS) < 1 < 1 < 1 ps VPP(AC) Input Voltage Swing (Differential Configuration) 150 150 150 mV tTr tf Rise/Fall Time (20 - 80%) 150 400 150 400 150 400 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. 10 Series: VEE can vary −0.46 V / +0.06 V. 100 Series: VEE can vary −0.46 V / +0.8 V. 2. Within-device skew is defined as identical transitions on similar paths through a device. Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) Driver Device Receiver Device QD Q D Zo = 50 W Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices |
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