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GS4288C09 Scheda tecnica(PDF) 7 Page - GSI Technology

Il numero della parte GS4288C09
Spiegazioni elettronici  32M x 9, 16M x 18, 8M x 36 288Mb CIO Low Latency DRAM (LLDRAM) II
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Produttore elettronici  GSI [GSI Technology]
Homepage  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS4288C09 Scheda tecnica(HTML) 7 Page - GSI Technology

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GS4288C09/18/36L
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 7/2014
7/62
© 2011, GSI Technology
4. tMRSC after the valid MRS, issues an AUTO REFRESH command to all 8 banks in any order (along with 1024 NOP
commands) prior to normal operation. As always, tRC must be met between any AUTO REFRESH and any subsequent
valid command to the same bank.
Notes:
1.
It is possible to apply VDDQ before VDD. However, when doing this, the DQs, DM, and all other pins with an output driver, will
go High instead of tri-stating. These pins will remain High until VDD is at the same level as VDDQ. Care should be taken to
avoid bus conflicts during this period.
2. If V
ID
(DC) on CK/CK can not be met prior to being applied to the LLDRAM II, placing a large external resistor from CS to VDD
is a viable option for ensuring the command bus does not receive unwanted commands during this unspecified state.


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