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TP3054-X Scheda tecnica(PDF) 5 Page - Texas Instruments

Il numero della parte TP3054-X
Spiegazioni elettronici  Extended Temperature Serial Interface CODEC/Filter COMBO Family
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Homepage  http://www.ti.com
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TP3054-X Scheda tecnica(HTML) 5 Page - Texas Instruments

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TP3054-X, TP3057-X
www.ti.com
SNOSBY2C – MARCH 2005 – REVISED APRIL 2013
RECEIVE SECTION
The receive section consists of an expanding DAC which drives a fifth order switched-capacitor low pass filter
clocked at 256 kHz. The decoder is A-law (TP3057) or
μ-law (TP3054) and the 5th order low pass filter corrects
for the sin x/x attenuation due to the 8 kHz sample/hold. The filter is then followed by a 2nd order RC active post-
filter/power amplifier capable of driving a 600
Ω load to a level of 7.2 dBm. The receive section is unity-gain. Upon
the occurrence of FSR, the data at the DR input is clocked in on the falling edge of the next eight BCLKR (BCLKX)
periods. At the end of the decoder time slot, the decoding cycle begins, and 10
μs later the decoder DAC output
is updated. The total decoder delay is
∼10 μs (decoder update) plus 110 μs (filter delay) plus 62.5 μs (½ frame),
which gives approximately 180
μs.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1) (2)
VCC to GNDA
7V
VBB to GNDA
−7V
Voltage at any Analog Input or Output
VCC+0.3V to VBB−0.3V
Voltage at any Digital Input or Output
VCC+0.3V to GNDA−0.3V
Operating Temperature Range
−55°C to + 125°C
Storage Temperature Range
−65°C to +150°C
Lead Temperature
(Soldering, 10 sec.)
300°C
(1)
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits.
(2)
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
Electrical Characteristics
Unless otherwise noted, limits printed in BOLD characters are ensured for VCC = +5.0V ±5%, VBB = −5.0V ±5%; TA = −40°C
to +85°C by correlation with 100% electrical testing at TA = 25°C. All other limits are assured by correlation with other
production tests and/or product design and characterization. All signals referenced to GNDA. Typicals specified at VCC =
+5.0V, VBB = −5.0V, TA = 25°C.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DIGITAL INTERFACE
VIL
Input Low Voltage
0.6
V
VIH
Input High Voltage
2.2
V
VOL
DX, IL=3.2 mA
0.4
V
Output Low Voltage
SIGR, IL=1.0 mA
0.4
V
TSX, IL=3.2 mA, Open Drain
0.4
V
VOH
DX, IH=−3.2 mA
2.4
V
Output High Voltage
SIGR, IH=−1.0 mA
2.4
V
IIL
Input Low Current
GNDA
≤VIN≤VIL, All Digital Inputs
−10
10
μA
IIH
Input High Current
VIH≤VIN≤VCC
−10
10
μA
IOZ
Output Current in High Impedance State
DX, GNDA≤VO≤VCC
−10
10
μA
(TRI-STATE)
ANALOG INTERFACE WITH TRANSMIT INPUT AMPLIFIER (ALL DEVICES)
IIXA
Input Leakage Current
−2.5V≤V≤+2.5V, VFXI
+ or VF
XI
−200
200
nA
RIXA
Input Resistance
−2.5V≤V≤+2.5V, VFXI
+ or VF
XI
10
M
Ω
ROXA
Output Resistance
Closed Loop, Unity Gain
1
3
Ω
RLXA
Load Resistance
GSX
10
k
Ω
CLXA
Load Capacitance
GSX
50
pF
VOXA
Output Dynamic Range
GSX, RL ≥ 10 kΩ
−2.8
2.8
V
AVXA
Voltage Gain
VFXI
+ to GS
X
5000
V/V
Copyright © 2005–2013, Texas Instruments Incorporated
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