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UC1707L883B Scheda tecnica(PDF) 6 Page - Texas Instruments

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Il numero della parte UC1707L883B
Spiegazioni elettronici  DUAL CHANNEL POWER DRIVER
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UC1707L883B Scheda tecnica(HTML) 6 Page - Texas Instruments

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SHUTDOWN CIRCUIT DESCRIPTION
UC1707, UC2707, UC3707
SLUS177B – MARCH 1999 – REVISED SEPTEMBER 2008 ............................................................................................................................................. www.ti.com
SIMPLIFIED INTERNAL CIRCUITRY (continued)
Figure 4. Use of the Shutdown Pin
The function of the circuitry is to be able to provide a shutdown of the device. This is defined as functionality that
will drive both outputs to the low state. There are three different inputs that govern this shutdown capability.
• Analog Stop Pins — The differential inputs to this comparator provide a way to execute a shutdown.
• Latch Disable Pin — Assuming that the Shutdown pin is left open, a high on this pin disables the latching
functionality of the Analog Stop shutdown. A low on this pin enables the latching functionality of the Analog
Stop shutdown. If a shutdown occurs through the Analog Stop circuit while Latch Disable is high, then the
outputs will go low, but will return to normal operation as soon as the Analog Stop circuit allows it. If a
shutdown occurs through the Analog Stop circuit while Latch Disable is low, then the outputs will go low and
remain low even if the Analog Stop circuit no longer drives the shutdown. The outputs will remain "latched"
low (in shutdown) until the Latch Disable goes high and the Analog Stop circuit allows it to return from
shutdown or the VIN voltage is cycled to 0V and then returned above 5V.
• Shutdown Pin — This pin serves two purposes.
1. It can be used as an output of the Analog Stop circuit.
2. It can be used as an input to force a shutdown or to force the device out of shutdown. This pin can
override both the Analog Stop circuit as well as the Latch Disable Pin. When driving hard logic levels into
the Shutdown pin, the Latch Disable functionality will be overridden and the Latch Disable will not function
as it does when used in conjunction with the Analog Stop circuit. When the Shutdown pin is high, the
outputs will be in the low state (shutdown). When the Shutdown pin is low (hard logic low) the outputs will
operate normally, regardless of the state of the Latch Disable pin or the Analog Stop pins.
In order to use the Shutdown Pin with the Latch Disable functional it is necessary to use either a diode in series
with the Shutdown signal or to use an open collector pull-up so that the Shutdown pin is not pulled low. This
configuration will allow the Latch Disable function to work with the Shutdown pin.
6
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Copyright © 1999–2008, Texas Instruments Incorporated
Product Folder Link(s): UC1707 UC2707 UC3707


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