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UC1705J Scheda tecnica(PDF) 2 Page - Texas Instruments |
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UC1705J Scheda tecnica(HTML) 2 Page - Texas Instruments |
2 / 18 page 2 1 3 V + V C S 5 4 N.I. IN INV. IN GND OUT 2 1 3 V C 6 4 N.I. IN INV. IN LOGIC GND N/C 7 8 5 PWR GND OUT V S 2 PWR GND 20 17 1 19 16 15 11 18 14 13 9 12 10 3 OUT V C N/C N/C 5 6 7 8 4 N/C N/C N/C N/C N/C UC1705 UC2705, UC3705 SLUS370D – JULY 1995 – REVISED MARCH 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. CONNECTION DIAGRAMS DIL-8 MINIDIP, SOIC-8 5-PIN TO-220 (TOP VIEW) (TOP VIEW) N, JG OR D PACKAGE T PACKAGE xxx xxx LCCC-20 (TOP VIEW) FK PACKAGE xxx 2 Submit Documentation Feedback Copyright © 1995–2012, Texas Instruments Incorporated Product Folder Link(s): UC1705 UC2705 UC3705 |
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