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UC1517L Scheda tecnica(PDF) 2 Page - Texas Instruments |
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UC1517L Scheda tecnica(HTML) 2 Page - Texas Instruments |
2 / 12 page PARAMETER TEST CONDITIONS UC1517 / UC3517 UNITS MIN TYP MAX Logic Supply, VCC Pin 16 4.75 5.25 V Second Supply, VSS Pin 15 10 40 V Logic Supply Current VINH = 0.4V 45 60 mA VINH = 4.0V 12 mA Input Low Voltage Pins 6, 7, 10, 11 0.8 V Input High Voltage Pins 6, 7, 10, 11 2.0 V Input Low Current Pins 6, 7, 10, 11; V = 0V -400 µA Input High Current Pins 6, 7, 10, 11; V = 5V 20 µA Phase Output Saturation Voltage Pins 1, 2, 4, 5; I = 350mA 0.6 0.85 V Phase Output Leakage Current Pins 1, 2, 4, 5; V = 39V 500 µA Follower Saturation Voltage to VSS Pins 13,14; I = 350mA -2 V Follower Leakage Current Pins 13,14; V = 0V 500 µA Output Low Voltage, ØA, ØB Pins 8, 9; I = 1.6mA 0.1 0.4 V Phase Turn-On Time Pins 1, 2, 4, 5 2 µs Phase Turn-Off Time Pins 1, 2, 4, 5 1.8 µs Second-Level On Time. TMONO Pins 13,14; Figure 3 Test Circuit 275 325 375 µs Logic Input Set-up Time, tS Pins 6, 10; Figure 4 400 ns Logic Input Hold Time, th Pins 6, 10; Figure 4 0 ns STEP Pulse Width, tP Pin 7; Figure 4 800 ns Timing Resistor Value Pin 12 1k 100k Ω Timing Capacitor Value Pin 12 0.1 500 nF Power-On Threshold Pin 16 4.3 V Power-Off Threshold Pin 16 3.8 V Power Hysteresis Pin 16 0.5 V UC1517 UC3517 PACKAGE PIN FUNCTION FUNCTION PIN N/C 1 PB2 2 PB1 3 GND 4 PA1 5 N/C 6 PA2 7 DIR 8 STEP 9 ØB 10 N/C 11 ØA 12 HSM 13 INH 14 RC 15 N/C 16 LA 17 LB 18 VSS 19 VCC 20 PLCC-20, LCC-20 (TOP VIEW) Q & L PACKAGE DIL-16 (TOP VIEW) J or N Package CONNECTION DIAGRAMS Unless otherwise stated, these specifications apply for TA = -55°C to +125°C for the UC1517 and 0°C to +70°C for the UC3517, Vcc=5V, VSS = 20V, TA=TJ. Pin numbers refer to DIL-16 package. ELECTRICAL CHARACTERISTICS: 2 |
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