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74ALVCH16820DGGRG4 Scheda tecnica(PDF) 1 Page - Texas Instruments

Il numero della parte 74ALVCH16820DGGRG4
Spiegazioni elettronici  3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
Logo TI1 - Texas Instruments

74ALVCH16820DGGRG4 Scheda tecnica(HTML) 1 Page - Texas Instruments

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FEATURES
DESCRIPTION/ORDERING INFORMATION
DGG OR DL PACKAGE
(TOP VIEW)
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1OE
1Q1
1Q2
GND
2Q1
2Q2
VCC
3Q1
3Q2
4Q1
GND
4Q2
5Q1
5Q2
6Q1
6Q2
7Q1
GND
7Q2
8Q1
8Q2
VCC
9Q1
9Q2
GND
10Q1
10Q2
2OE
CLK
D1
NC
GND
D2
NC
VCC
D3
NC
D4
GND
NC
D5
NC
D6
NC
D7
GND
NC
D8
NC
VCC
D9
NC
GND
D10
NC
NC
NC − No internal connection
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
SN74ALVCH16820
3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS
AND 3-STATE OUTPUTS
SCES035G – JULY 1995 – REVISED OCTOBER 2004
Member of the Texas Instruments Widebus™
Family
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
This 10-bit flip-flop is designed for 1.65-V to 3.6-V
VCC operation.
The
flip-flops
of
the
SN74ALVCH16820
are
edge-triggered D-type flip-flops. On the positive
transition of the clock (CLK) input, the device
provides true data at the Q outputs.
A buffered output-enable (OE) input can be used to
place the ten outputs in either a normal logic state
(high or low logic level) or the high-impedance state.
In the high-impedance state, the outputs neither load
nor
drive
the
bus
lines
significantly.
The
high-impedance state and increased drive provide the
capability to drive bus lines without need for interface
or pullup components.
OE input does not affect the internal operation of the
flip-flops. Old data can be retained or new data can
be
entered
while
the
outputs
are
in
the
high-impedance state.
To ensure the high-impedance state during power up
or power down, OE should be tied to VCC through a
pullup resistor; the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
with the bus-hold circuitry is not recommended.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
Tube
SN74ALVCH16820DL
SSOP - DL
ALVCH16820
-40
°C to 85°C
Tape and reel
SN74ALVCH16820DLR
TSSOP - DGG
Tape and reel
SN74ALVCH16820DGGR
ALVCH16820
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1995–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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