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SN74AHC573DW Scheda tecnica(PDF) 11 Page - Texas Instruments |
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SN74AHC573DW Scheda tecnica(HTML) 11 Page - Texas Instruments |
11 / 32 page OE To Seven Other Channels LE 1D C1 1D 1Q SN54AHC573, SN74AHC573 www.ti.com SCLS242L – OCTOBER 1995 – REVISED SEPTEMBER 2014 9 Detailed Description 9.1 Overview The SNx4AHC573 devices are octal transparent D-type latches designed for 2-V to 5.5-V VCC operation. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. 9.2 Functional Block Diagram 9.3 Feature Description • Wide operating voltage range – Operates from 2 V to 5.5 V • Allows down voltage translation – Inputs accept voltages to 5.5 V • Slow edges reduce output ringing 9.4 Device Functional Modes Table 1. Function Table (Each Latch) INPUTS OUTPUT Q OE LE D L H H H L H L L L L X Q0 H X X Z Copyright © 1995–2014, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: SN54AHC573 SN74AHC573 |
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