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LM3000 Scheda tecnica(PDF) 7 Page - Texas Instruments |
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LM3000 Scheda tecnica(HTML) 7 Page - Texas Instruments |
7 / 41 page LM3000 www.ti.com SNVS612B – JULY 2009 – REVISED APRIL 2013 Electrical Characteristics (continued) Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise noted, VIN = 12.0V, IEN1 = IEN2 = 40 µA. Symbol Parameter Condition Min Typ Max Units VCOMP-HI COMP Pin Voltage High Clamp 2.80 3.0 3.2 V VCOMP-LO COMP Pin Voltage Low Clamp 0.48 V VOS-TRK Offset Using TRK Pin TRK = 0.45V -9.0 0 9.0 mV gm Transconductance 1400 µS fBW Unity Gain Bandwidth Frequency 10 MHz INTERNAL VOLTAGE REGULATOR VVDD Internal Core Regulator Voltage No External Load 5.15 V VVDD-ON UVLO Thresholds VDD Rising 2.12 V Hysteresis 0.14 VVDD-DO Internal Core Regulator Dropout Voltage No External Load 1.1 V IVDD-ILIM Internal Core Regulator Current Limit VDD Short to Ground 80 mA VVDR Regulator for External MOSFET Drivers IVDR = 100 mA 5.2 V VVDR-DO Driver Regulator Dropout Voltage IVDR = 100 mA 1.0 V IVDR-ILIM Driver Regulator Current Limit VDR Short to Ground 450 mA PGOOD OUTPUT RPG-ON PGOOD On-Resistance FB1 = FB2 = 0.47V 250 Ω IOH PGOOD High Leakage Current VPGOOD = 5V 100 nA THERMAL RESISTANCE θJA Junction-to-Ambient Thermal Resistance WQFN-32 Package(1) 26.4 °C/W (1) Tested on a four layer JEDEC board. Four vias provided under the exposed pad. See JEDEC standards JESD51-5 and JESD51-7. Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: LM3000 |
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