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SN74ABT543NT Scheda tecnica(PDF) 1 Page - Texas Instruments

Il numero della parte SN74ABT543NT
Spiegazioni elettronici  COTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
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SN74ABT543NT Scheda tecnica(HTML) 1 Page - Texas Instruments

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SN54ABT543, SN74ABT543
OCTAL REGISTERED TRANSCEIVERS
WITH 3STATE OUTPUTS
SCBS157A − JANUARY 1991 − REVISED JULY 1994
Copyright
1994, Texas Instruments Incorporated
2−1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Typical V
OLP (Output Ground Bounce)
< 1 V at VCC = 5 V, TA = 25°C
High-Drive Outputs (−32-mA I
OH,
64-mA IOL)
Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, Ceramic
Chip Carriers (FK), and Plastic (NT) and
Ceramic (JT) DIPs
description
The
′ABT543 octal transceivers contain two sets
of D-type latches for temporary storage of data
flowing in either direction. Separate latch-enable
(LEAB or LEBA) and output-enable (OEAB or
OEBA) inputs are provided for each register to
permit independent control in either direction of
data flow.
The A-to-B enable (CEAB) input must be low in
order to enter data from A or to output data from
B. If CEAB is low and LEAB is low, the A-to-B
latches are transparent; a subsequent low-to-high
transition of LEAB puts the A latches in the storage
mode. With CEAB and OEAB both low, the 3-state
B outputs are active and reflect the data present
at the output of the A latches. Data flow from B to
A is similar but requires using the CEBA, LEBA,
and OEBA inputs.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74ABT543 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54ABT543 is characterized for operation over the full military temperature range of −55
°C to 125°C. The
SN74ABT543 is characterized for operation from − 40
°C to 85°C.
SN54ABT543 ...JT PACKAGE
SN74ABT543 . . . DB, DW, OR NT PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
LEBA
OEBA
A1
A2
A3
A4
A5
A6
A7
A8
CEAB
GND
VCC
CEBA
B1
B2
B3
B4
B5
B6
B7
B8
LEAB
OEAB
SN54ABT543 . . . FK PACKAGE
(TOP VIEW)
32 1 28 27
12 13
5
6
7
8
9
10
11
25
24
23
22
21
20
19
B2
B3
B4
NC
B5
B6
B7
A2
A3
A4
NC
A5
A6
A7
426
14 15 16 17 18
NC − No internal connection
EPIC-
ΙΙB is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.


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