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AM1705BPTP3 Scheda tecnica(PDF) 5 Page - Texas Instruments

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Spiegazioni elettronici  AM1705 ARM짰 Microprocessor
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AM1705
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SPRS657E – FEBRUARY 2010 – REVISED JUNE 2014
2
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
This data manual revision history highlights the changes made to the SPRS657D device-specific data
manual to make it an SPRS657E revision.
Scope: Applicable updates to the AM170x ARM microprocessor device family, specifically relating to the
AM1705 device, which are all now in the production data (PD) stage of development, have been
incorporated.
Revision History
SEE
ADDITIONS/MODIFICATIONS/DELETIONS
Added Navigation Icons on top of first page.
Updated Features, Applications, and Description for consistency and translation.
Global
Moved Trademarks information from first page to within Section 7, Device and Documentation Support.
Moved ESDS Warning to within Section 7, Device and Documentation Support.
Added numbering to section and table titles that were missing.
Section 1.1
Deleted Highlights section. Information was duplicated elsewhere in Features.
Features
Section 1.2
Added NEW section.
Applications
Section 1.3
Added NEW Device Information Table.
Description
Section 3.6.14, Universal Serial Bus Modules (USB0):
Section 3.6
Updated/Changed USB0_VDDA12 DESCRIPTION from "...output for bypass cap." to "...output for
Terminal Functions
bypass cap. For proper device operation, this pin is recommended to be connected..."
Table 3-19, Reserved and No Connect Terminal Functions:
Section 3.6.17
Reserved and No
Updated/Changed RSV4 DESCRIPTION from "...This pin may be tied high or low." to "...For proper
Connect
device operation, this pin must be tied low or to CVDD."
Moved Section to within Section 3.6, Terminal Functions
Section 3.6.19
Unused USB0
Table 3-21, Unused USB0 Pin Configurations:
(USB2.0) Pin
Updated/Changed USB0_VDDA12 Configuration from "No Connect" to "Internal USB0 PHY output
Configurations
connected to an external..."
Section 5.2, Handling Ratings:
Section 5
Split handling, ratings, and certifications from the Abs Max table and placed in NEW Handling Ratings
Device Operating
table.
Conditions
Section 5.3, Recommended Operating Conditions:
Added "Unless specifically indicated" to "These I/O specifications apply to ..." footnote
Section 5.4
Notes on
Table 5-1, Recommended Power-On Hours:
Recommended
Added Silicon Revision column.
Power-On Hours
(POH)
Figure 6-9, PLL Topology:
Section 6.6
Clock PLLs
Updated/Changed to correct graphic.
Table 6-19, EMIFA Asynchronous Memory Switching Characteristics:
Section 6.10.4
EMIFA Electrical
Updated/Changed the MIN, NOM, and MAX equations for NO. 3, 10, 15, and 24 from "...(EWC*16)..." to
Data/Timing
"...EWC..."
Copyright © 2010–2014, Texas Instruments Incorporated
Revision History
5
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