Motore di ricerca datesheet componenti elettronici |
|
SN74AHC1G126DRLR Scheda tecnica(PDF) 8 Page - Texas Instruments |
|
|
SN74AHC1G126DRLR Scheda tecnica(HTML) 8 Page - Texas Instruments |
8 / 22 page A Y OE SN74AHC1G126 SCLS379K – AUGUST 1997 – REVISED DECEMBER 2014 www.ti.com 9 Detailed Description 9.1 Overview The SN74AHC1G126 device is a single bus buffer gate/line driver with 3-state output. The output is disabled when the output-enable (OE) input is low. When OE is high, true data is passed from the A input to the Y output. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. 9.2 Functional Block Diagram Figure 4. Logic Diagram (Positive Logic) 9.3 Feature Description • Wide operating voltage range – Operates from 2 V to 5.5 V • Allows down-voltage translation – Inputs accept voltages to 5.5 V 9.4 Device Functional Modes Table 1. Function Table INPUTS OUTPUT Y OE A H H H H L L L X Z 8 Submit Documentation Feedback Copyright © 1997–2014, Texas Instruments Incorporated Product Folder Links: SN74AHC1G126 |
Codice articolo simile - SN74AHC1G126DRLR |
|
Descrizione simile - SN74AHC1G126DRLR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEETIT.COM |
Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |