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MJ-80C32E-30-E Scheda tecnica(PDF) 11 Page - ATMEL Corporation |
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MJ-80C32E-30-E Scheda tecnica(HTML) 11 Page - ATMEL Corporation |
11 / 20 page 11 80C32E 4149M–AERO–06/04 Figure 5. ICC Test Condition, Power-down Mode Figure 6. Clock Signal Waveform for ICC Tests in Active and Idle Modes RST EA XTAL2 XTAL1 VSS VCC V CC ICC (NC) P0 VCC All other pins are disconnected. Reset = Vss after a high pulse during at least 24 clock cycles V CC-0.5V 0.45V 0.7VCC 0.2VCC-0.1 TCLCH TCHCL TCLCH = TCHCL = 5ns. |
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Descrizione simile - MJ-80C32E-30-E |
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