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TPA3251 Scheda tecnica(PDF) 7 Page - Texas Instruments |
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TPA3251 Scheda tecnica(HTML) 7 Page - Texas Instruments |
7 / 39 page 7 TPA3251 www.ti.com SLASE40D – MAY 2015 – REVISED APRIL 2016 Product Folder Links: TPA3251 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated (1) Specified by design. 7.5 Electrical Characteristics PVDD_X = 36 V, GVDD_X = 12 V, VDD = 12 V, TC (Case temperature) = 75°C, fS = 600 kHz, unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INTERNAL VOLTAGE REGULATOR AND CURRENT CONSUMPTION DVDD Voltage regulator, only used as reference node VDD = 12 V 3 3.3 3.6 V AVDD Voltage regulator, only used as reference node VDD = 12 V 7.8 V IVDD VDD supply current Operating, 50% duty cycle 40 mA Idle, reset mode 13 IGVDD_X Gate-supply current per full-bridge 50% duty cycle 25 mA Reset mode 3 IPVDD_X PVDD idle current per full bridge 50% duty cycle with recommended output filter 12.5 mA Reset mode, No switching 1 mA ANALOG INPUTS RIN Input resistance 24 k Ω VIN Maximum input voltage swing 7 V IIN Maximum input current 1 mA G Inverting voltage Gain VOUT/VIN 20 dB OSCILLATOR fOSC(IO+) Nominal, Master Mode FPWM × 6 3.45 3.6 3.75 MHz AM1, Master Mode 2.85 3 3.15 AM2, Master Mode 2.58 2.7 2.82 VIH High level input voltage 1.86 V VIL Low level input voltage 1.45 V OUTPUT-STAGE MOSFETs RDS(on) Drain-to-source resistance, low side (LS) TJ = 25°C, Includes metallization resistance, GVDD = 12 V 60 100 m Ω Drain-to-source resistance, high side (HS) 60 100 m Ω I/O PROTECTION Vuvp,VDD,GVDD Undervoltage protection limit, GVDD_x and VDD 9.5 V Vuvp,VDD, GVDD,hyst (1) 0.6 V OTW Overtemperature warning, CLIP_OTW(1) 115 125 135 °C OTWhyst (1) Temperature drop needed below OTW temperature for CLIP_OTW to be inactive after OTW event. 25 °C OTE(1) Overtemperature error 145 155 165 °C OTE-OTW(differential) (1) OTE-OTW differential 30 °C OTEhyst (1) A reset needs to occur for FAULT to be released following an OTE event 25 °C OLPC Overload protection counter fPWM = 600 kHz 1.7 ms IOC Overcurrent limit protection Resistor – programmable, nominal peak current in 1 Ω load, ROCP = 22 kΩ 14 A IOC(LATCHED) Overcurrent limit protection Resistor – programmable, peak current in 1 Ω load, ROCP = 47kΩ 14 A IDCspkr DC Speaker Protection Current Threshold BTL current imbalance threshold 1.5 A IOCT Overcurrent response time Time from switching transition to flip-state induced by overcurrent. 150 ns IPD Output pulldown current of each half Connected when RESET is active to provide bootstrap charge. Not used in SE mode. 3 mA |
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