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54LVXC4245 Scheda tecnica(PDF) 6 Page - National Semiconductor (TI) |
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54LVXC4245 Scheda tecnica(HTML) 6 Page - National Semiconductor (TI) |
6 / 9 page Configurable I/O Application for mixed or unknown Voltages LVXC4245 is designed to solve 3V/5V interfacing issues when CMOS devices cannot tolerate I/O levels above their applied V CC. If an I/O pin of 3V ICs is driven by 5V ICs, the P-Channel transistor in 3V ICs will conduct causing current flow from I/O bus to the 3V power supply. The resulting high current flow can cause destruction of 3V ICs through latchup effects. To prevent this problem, a current limiting resistor is used typically under direct connection of 3V ICs and 5V ICs, but it causes speed degradation. In a better solution, the LVXC4245 configures two different output levels to handle the dual supply interface issues. The “A” port is a dedicated 5V port to interface 5V ICs. The “B” port is configurable and accepts a 3V-to-5V supply level. This configurable ″B″ port provides maximum flexibility for in- terfacing to unknown supply voltages, for interfacing to sup- ply voltages which may change in the future, or for providing flexibility when supplying systems to multiple customers with varying power supply requirements. Figure 1 shows how the LVXC4245 fits into a system with a 3V subsystem and a 5V subsystem. DS101033-3 FIGURE 1. LVXC4245 Fits into a System with 3V Subsystem and 5V Subsystem www.national.com 6 |
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