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UC1707-SP Scheda tecnica(PDF) 5 Page - Texas Instruments |
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UC1707-SP Scheda tecnica(HTML) 5 Page - Texas Instruments |
5 / 20 page 5 UC1707-SP www.ti.com SLUSAG0A – MARCH 2011 – REVISED MARCH 2016 Product Folder Links: UC1707-SP Submit Documentation Feedback Copyright © 2011–2016, Texas Instruments Incorporated Electrical Characteristics (continued) Unless otherwise stated, these specifications apply for TA = –55°C to 125°C; VIN = VC = 20 V. TA = TJ. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VC Supply current VC = 40 V, outputs low 5.2 7.5 mA VC Leakage current VIN = 0, VC - 30 V, no load 0.05 0.1 mA Digital input low level 0.8 V Digital input high level 2.2 V Input current VI = 0 –0.06 –1.0 mA Input leakage VI = 5 V 0.05 0.1 mA VC – VO Output high sat IO = –50 mA 2.0 V IO = –500 mA 2.5 V VO Output low sat IO = –50 mA 0.4 V IO = –500 mA 2.5 V Analog threshold VCM = 0 to 15 V 8761901 100 130 150 mV 8761903 90 130 150 mV Input bias current VCM = 0 –10 –20 μA Thermal shutdown 155 °C Shutdown threshold Pin 7 input 0.4 1.0 2.2 V Latch disable threshold Pin 3 input 0.8 1.2 2.2 V 6.6 Typical Switching Characteristics VIN = VC = 20 V, TA = 25°C. Delays measured to 10% output change. PARAMETER TEST CONDITIONS OUTPUT CL = UNIT FROM INV. INPUT TO OUTPUT open 1.0 2.2 nF Rise time delay 40 50 60 ns 10% to 90% rise 25 40 50 ns Fall time delay 30 40 50 ns 90% to 10% fall 25 40 50 ns FROM N.I. INPUT TO OUTPUT Rise time delay 30 40 50 ns 10% to 90% rise 25 40 50 ns Fall time delay 45 55 65 ns 90% to 10% fall 25 40 50 ns VC Cross-conduction current spike duration Output rise 25 ns Output fall 0 ns Analog shutdown delay Stop non-Inv. = 0 V 180 ns Stop Inv. = 0 to 0.5 V 180 ns Digital shutdown delay 2 V input on Pin 7 50 ns |
Codice articolo simile - UC1707-SP_16 |
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Descrizione simile - UC1707-SP_16 |
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