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ADXRS622 Scheda tecnica(PDF) 10 Page - Analog Devices |
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ADXRS622 Scheda tecnica(HTML) 10 Page - Analog Devices |
10 / 12 page ADXRS622 Rev. C | Page 10 of 12 ADXRS622 AND SUPPLY RATIOMETRICITY The ADXRS622 RATEOUT and TEMP signals are ratiometric to the VRATIO voltage, that is, the null voltage, rate sensitivity, and temperature outputs are proportional to VRATIO. Therefore, the ADXRS622 is most easily used with a supply-ratiometric analog- to-digital converter (ADC) that results in self-cancellation of errors due to minor supply variations. There is some small error due to nonratiometric behavior. Typical ratiometricity error for null, sensitivity, self-test, and temperature output is outlined in Table 4. Note that VRATIO must never be greater than AVCC. Table 4. Ratiometricity Error for Various Parameters Parameter V S = VRATIO = 4.85 V V S = VRATIO = 5.15 V ST1 Mean 0.3% 0.09% Sigma 0.21% 0.19% ST2 Mean −0.15% −0.2% Sigma 0.22% 0.2% Null Mean −0.3% −0.05% Sigma 0.2% 0.08% Sensitivity Mean 0.003% −0.25% Sigma 0.06% 0.06% V TEMP Mean −0.2% −0.04% Sigma 0.05% 0.06% NULL ADJUSTMENT The nominal 2.5 V null is for a symmetrical swing range at RATEOUT (1B, 2A). However, a nonsymmetric output swing may be suitable in some applications. Null adjustment is possible by injecting a suitable current to SUMJ (1C, 2C). Note that supply disturbances may reflect some null instability. Digital supply noise should be avoided, particularly in this case. SELF-TEST FUNCTION The ADXRS622 includes a self-test feature that actuates each of the sensing structures and associated electronics as if subjected to angular rate. It is activated by standard logic high levels applied to Input ST1 (5F, 5G), Input ST2 (4F, 4G), or both. ST1 causes the voltage at RATEOUT to change about − 0.5 V, and ST2 causes an opposite change of +0.5 V. The self-test response follows the viscosity temperature dependence of the package atmosphere, approximately 0.25%/°C. Activating both ST1 and ST2 simultaneously is not damaging. ST1 and ST2 are fairly closely matched (±5%), but actuating both simultaneously may result in a small apparent null bias shift proportional to the degree of self-test mismatch. ST1 and ST2 are activated by applying a voltage equal to VRATIO to the ST1 pin and the ST2 pin. The voltage applied to ST1 and ST2 must never be greater than AVCC. CONTINUOUS SELF-TEST The on-chip integration of the ADXRS622 gives it higher reliability than is obtainable with any other high volume manufacturing method. In addition, it is manufactured under a mature BIMOS process that has field-proven reliability. As an additional failure detection measure, power-on self-test can be performed. However, some applications may warrant continuous self-test while sensing rate. Details outlining continuous self-test techniques are also available in the AN-768 Application Note. |
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