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VNH7100AS Scheda tecnica(PDF) 6 Page - STMicroelectronics |
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VNH7100AS Scheda tecnica(HTML) 6 Page - STMicroelectronics |
6 / 38 page Block diagram and pin description VNH7100AS 6/38 DocID028092 Rev 4 Figure 2. Configuration diagram (top view) Fault detection Signalizes the abnormal behavior of the switch through MultiSense pin. Power limitation Limits the power dissipation of the high-side driver inside safe range in case of short to ground condition. Table 3. Pin definitions and functions Pin N° Symbol Function 1, 16 GNDA Source of low-side switch A 2, 15 OUTA Source of high-side switch A / drain of low-side switch A 3INA Clockwise input 4, 5, 12 VCC Power supply voltage 6INB Counter clockwise input 7, 10 OUTB Source of high-side switch B / drain of low-side switch B 8, 9 GNDB Source of low-side switch B 11 PWM Voltage controlled input pin with hysteresis, CMOS compatible. Gates of low-side FETS get modulated by the PWM signal during their on phase allowing speed control of the motor. Active high. 13 CS Multiplexed analog sense output pin; it delivers a current proportional to the motor current. 14 SEL0 Active high compatible with 3 V and 5 V CMOS outputs pin; in combination with INA, INB, it addresses the CurrentSense information delivered to the micro according to the operative truth table. Table 2. Block description (continued) Name Description |
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