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STP12N60M2 Scheda tecnica(PDF) 4 Page - STMicroelectronics |
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STP12N60M2 Scheda tecnica(HTML) 4 Page - STMicroelectronics |
4 / 13 page Electrical characteristics STP12N60M2 4/13 DocID027902 Rev 1 2 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 5: Static Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA 600 V IDSS Zero gate voltage drain current VGS = 0 V, VDS = 600 V 1 µA VGS = 0 V, VDS = 600 V, Tcase = 125 °C 100 IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 3 4 V RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 4.5 A 0.395 0.450 Ω Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 538 - pF Coss Output capacitance - 29 - Crss Reverse transfer capacitance - 1.1 - Coss eq. (1) Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 106 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 7 - Ω Qg Total gate charge VDD = 400 V, ID = 9 A, VGS = 10 V (see Figure 15: "Gate charge test circuit") - 16 - nC Qgs Gate-source charge - 2.3 - Qgd Gate-drain charge - 8.5 - Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 300 V, ID = 4.5 A RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Switching times test circuit for resistive load" and Figure 19: "Switching time waveform") - 9.2 - ns tr Rise time - 9.2 - td(off) Turn-off delay time - 56 - tf Fall time - 18 - |
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