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TS3002ITD822 Scheda tecnica(PDF) 8 Page - Silicon Laboratories |
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TS3002ITD822 Scheda tecnica(HTML) 8 Page - Silicon Laboratories |
8 / 13 page TS3002 Page 8 TS3002 Rev. 1.0 PIN FUNCTIONS PIN NAME FUNCTION 1 FOUT Fixed Frequency Output. A push-pull output stage with an output resistance of 160 Ω, the FOUT pin swings from GND to VDD. For lowest power operation, capacitive loads should be minimized and resistive loads should be maximized. 2 BOOST BOOST Input. A digital switch input, BOOST controls the propagation delay of the primary timing comparator in the TS3002’s master oscillator subcircuit. Connecting the BOOST pin to GND sets the maximum programmable oscillator frequency to ~90kHz.Connecting the BOOST pin to VDD reduces the comparator’s propagation delay and increases the maximum programmable master oscillator’s frequency to 290kHz. 3 PWMOUT Pulse-width Modulated Output. A push-pull output stage with an output resistance of 160 Ω, the PWMOUT pin is wired anti-phase with respect to FOUT and swings from GND to VDD. For lowest power operation, capacitive loads should be minimized and resistive loads should be maximized. 4 CNTRL PWMOUT Enable and Duty Cycle Control Input. An analog input pin, the VCNTRL pin voltage enables the TS3002’s PWM engine and controls the duty cycle at PWMOUT from 12% (VCNTRL = 0.03 x VDD) to 90% (VCNTRL = 0.27 x VDD). Enabling the PWM engine increases the TS3002’s nominal operating supply current. To disable the TS3002’s PWM engine, CNTRL shall be connected to VDD. 5 CSET FOUT Programming Capacitor Input. A 7.9pF capacitor connected from this pin to GND in junction with a 4.32M Ω resistor at the RSET pin sets the TS3002’s internal oscillator’s output period to ~40µs (25kHz). The maximum capacitance value is 22pF. 6 GND Ground – Connect this pin to the system’s analog ground plane. 7 RSET FOUT Programming Resistor Input. A 4.32M Ω resistor connected from this pin to GND sets the TS3002’s internal oscillator’s output period to 40 μs (25kHz). For optimal performance, the composition of the RSET resistor shall be consistent with tolerances of 1% or lower. The RSET pin voltage is 0.3V at a 1V supply. 8 VDD Power Supply Voltage Input. While the TS3002 is fully specified at 1V, the supply voltage range is 0.9V ≤ VDD ≤ 1.8V. It is always considered good engineering practice to bypass the VDD pin with a 0.1 μF ceramic decoupling capacitor in close proximity to the TS3002. EP ----- Exposed paddle is electrically connected to GND. |
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