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8V31012NLGI Scheda tecnica(PDF) 1 Page - Integrated Device Technology |
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1 / 17 page DATA SHEET 1-to-12, Differential HCSL Fanout Buffer 8V31012 8V31012 REVISION 1 10/21/15 1 ©2015 Integrated Device Technology, Inc. 48-pin, 7mm x 7mm VFQFN Package VDD Q2 GND nQ1 Q1 VDD nQ0 Q0 nQ3 Q3 nQ2 VDD Q7 VDD Q8 nQ8 GND Q9 nQ9 VDD nQ6 VDD nQ7 Q6 36 35 34 33 32 31 30 28 29 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5 6 7 9 8 10 11 12 48 47 46 45 44 43 42 41 40 39 38 37 8V31012 General Description The 8V31012 is a 1-to-12 Differential HCSL Fanout Buffer. The 8V31012 is designed to translate any differential signal levels to differential HCSL output levels. An external reference resistor is used to set the value of the current supplied to an external load/termination resistor. The load resistor value is chosen to equal the value of the characteristic line impedance of 50 . The 8V31012 is characterized at an operating supply voltage of 3.3V. The differential HCSL outputs, accurate crossover voltage and duty cycle make the 8V31012 ideal for interfacing to PCI Express and FBDIMM applications. Features • Twelve differential HCSL outputs • Translates any differential input signal (LVPECL, LVHSTL, LVDS, HCSL) to HCSL levels without external bias networks • Maximum output frequency: 250MHz • Output skew: 265ps (typical) • V OH: 850mV (maximum) • Full 3.3V supply voltage • Available in lead-free (RoHS 6) package • -40°C to 85°C ambient operating temperature CLK nCLK IREF Q11 nQ11 Q10 nQ10 Q9 nQ9 Q8 nQ8 Q7 nQ7 Q6 nQ6 Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 Q5 nQ5 Pin Assignment Block Diagram |
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