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TMP100-Q1 Scheda tecnica(PDF) 6 Page - Texas Instruments |
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TMP100-Q1 Scheda tecnica(HTML) 6 Page - Texas Instruments |
6 / 20 page I/O Control Interface SCL SDA Temperature Register Configuration Register T LOW Register T HIGH Register Pointer Register TMP100-Q1 TMP101-Q1 SBOS581 – SEPTEMBER 2011 www.ti.com POINTER REGISTER Figure 8 shows the internal register structure of the TMP100-Q1 and TMP101-Q1. The 8-bit Pointer Register of the TMP100-Q1 and TMP101-Q1 is used to address a given data register. The Pointer Register uses the two LSBs to identify which of the data registers should respond to a read or write command. Table 1 identifies the bits of the Pointer Register byte. Table 2 describes the pointer address of the registers available in the TMP100-Q1 and TMP101-Q1. Power-up Reset value of P1/P0 is 00. Figure 8. Internal Register Structure of the TMP100-Q1 and TMP101-Q1 Table 1. Pointer Register Type P7 P6 P5 P4 P3 P2 P1 P0 0 0 0 0 0 0 Register Bits Table 2. Pointer Addresses of the TMP100-Q1 and TMP101-Q1 Registers P1 P0 REGISTER 0 0 Temperature Register (READ Only) 0 1 Configuration Register (READ/WRITE) 1 0 TLOW Register (READ/WRITE) 1 1 THIGH Register (READ/WRITE) TEMPERATURE REGISTER The Temperature Register of the TMP100-Q1 or TMP101-Q1 is a 12-bit read-only register that stores the output of the most recent conversion. Two bytes must be read to obtain data and are described in Table 3 and Table 4. The first 12 bits are used to indicate temperature with all remaining bits equal to zero. Data format for temperature is summarized in Table 5. Following power-up or reset, the Temperature Register will read 0 °C until the first conversion is complete. Table 3. Byte 1 of Temperature Register D7 D6 D5 D4 D3 D2 D1 D0 T11 T10 T9 T8 T7 T6 T5 T4 6 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): TMP100-Q1 TMP101-Q1 |
Codice articolo simile - TMP100-Q1_15 |
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Descrizione simile - TMP100-Q1_15 |
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