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SM5859AF Scheda tecnica(PDF) 6 Page - Nippon Precision Circuits Inc |
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SM5859AF Scheda tecnica(HTML) 6 Page - Nippon Precision Circuits Inc |
6 / 33 page NIPPON PRECISION CIRCUITS-6 SM5859AF Parameter Symbol Condition Rating Unit System clock Min Typ Max Clock pulsewidth (HIGH level) tCWH 26 29.5 125 ns Clock pulsewidth (LOW level) tCWL 26 29.5 125 ns Clock pulse cycle tCY 384fs 56 59 250 ns CWH t CWL t CY t 0.5VDD CLK Parameter Symbol Rating Unit Condition Min Typ Max YSCK pulsewidth (HIGH level) tBCWH 75 ns YSCK pulsewidth (LOW level) tBCWL 75 ns YSCK pulse cycle tBCY 150 ns YSRDATA setup time tDS 40 ns YSRDATA hold time tDH 40 ns Last YSCK rising edge to YLRCK edge tBL 40 ns YLRCK edge to first YSCK rising edge tLB 40 ns 0 2fs Memory system ON YLRCK pulse frequency (MSON=H) See note below. fs fs Memory system OFF (MSON=L) Note. When the memory system is OFF (through mode), the input data rate is synchronized to the system clock input (384fs), so input data needs to be at 1/384 of this frequency. But, this IC can tolerate a certain amount of jitter. For details, refer to Through-mode operation. YSCK YSRDATA YLRCK BCY t DS t DH t BCWH t BCWL t LB t BL t 0.5VDD 0.5VDD 0.5VDD Serial input (YSRDATA, YLRCK, YSCK pins) AC characteristics Standard voltage: VDD = 4.5 to 5.5 V, VSS = 0 V, Ta = -40 to 85 °C Low-voltage: VDD = 2.7 to 4.5 V, VSS = 0 V, Ta = -20 to 70 °C (*) Typical values are for fs = 44.1 kHz System clock (CLK pin) System clock input |
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